| 2021-10-24 16:33:13 - [INFO] - {{Project Git Info}} Repository: https://github.com/MadhuriKadam9/caravel_avsdopamp_3v3_sky130_v2.git | Branch: main | Commit: e7abdc8062034182161ec61b0c757ba3a1f8456d |
| 2021-10-24 16:33:13 - [INFO] - {{EXTRACTING GDS}} Extracting GDS files in: two_stage_cmos_opamp_with_frequency_compensation |
| 2021-10-24 16:33:13 - [INFO] - {{Project GDS Info}} user_analog_project_wrapper: 1471252d337404ab6ba9551a3bab0bf95257782a |
| 2021-10-24 16:33:13 - [INFO] - {{Tools Info}} KLayout: v0.27.3 | Magic: v8.3.220 |
| 2021-10-24 16:33:13 - [INFO] - {{PDKs Info}} Open PDKs: 6c05bc48dc88784f9d98b89d6791cdfd91526676 | Skywater PDK: c094b6e83a4f9298e47f696ec5a7fd53535ec5eb |
| 2021-10-24 16:33:13 - [INFO] - {{START}} Precheck Started, the full log 'precheck.log' will be located in 'two_stage_cmos_opamp_with_frequency_compensation/jobs/mpw_precheck/c123b7d9-03e3-4a32-b399-6d4dfea99dbd/logs' |
| 2021-10-24 16:33:13 - [INFO] - {{PRECHECK SEQUENCE}} Precheck will run the following checks: License Manifest Makefile Default Documentation Consistency XOR Magic DRC Klayout FEOL Klayout BEOL Klayout Offgrid Klayout Metal Minimum Clear Area Density Klayout Pin Label Purposes Overlapping Drawing Klayout ZeroArea |
| 2021-10-24 16:33:13 - [INFO] - {{STEP UPDATE}} Executing Check 1 of 14: License |
| 2021-10-24 16:33:14 - [INFO] - An approved LICENSE (Apache-2.0) was found in two_stage_cmos_opamp_with_frequency_compensation. |
| 2021-10-24 16:33:14 - [INFO] - {{MAIN LICENSE CHECK PASSED}} An approved LICENSE was found in project root. |
| 2021-10-24 16:33:14 - [INFO] - An approved LICENSE (Apache-2.0) was found in two_stage_cmos_opamp_with_frequency_compensation. |
| 2021-10-24 16:33:14 - [INFO] - {{SUBMODULES LICENSE CHECK PASSED}} No prohibited LICENSE file(s) was found in project submodules |
| 2021-10-24 16:33:14 - [ERROR] - SPDX COMPLIANCE FILE UNICODE DECODE EXCEPTION in (two_stage_cmos_opamp_with_frequency_compensation/Pre-layout Simulation/Screenshots of Output/Vout-AC-Mag-Res.PNG): 'utf-8' codec can't decode byte 0x89 in position 0: invalid start byte |
| 2021-10-24 16:33:14 - [ERROR] - SPDX COMPLIANCE FILE UNICODE DECODE EXCEPTION in (two_stage_cmos_opamp_with_frequency_compensation/Pre-layout Simulation/Screenshots of Output/Vout-tran.PNG): 'utf-8' codec can't decode byte 0x89 in position 0: invalid start byte |
| 2021-10-24 16:33:14 - [ERROR] - SPDX COMPLIANCE FILE UNICODE DECODE EXCEPTION in (two_stage_cmos_opamp_with_frequency_compensation/Pre-layout Simulation/Screenshots of Output/ACM.PNG): 'utf-8' codec can't decode byte 0x89 in position 0: invalid start byte |
| 2021-10-24 16:33:14 - [ERROR] - SPDX COMPLIANCE FILE UNICODE DECODE EXCEPTION in (two_stage_cmos_opamp_with_frequency_compensation/Pre-layout Simulation/Screenshots of Output/Vin-tran.PNG): 'utf-8' codec can't decode byte 0x89 in position 0: invalid start byte |
| 2021-10-24 16:33:14 - [ERROR] - SPDX COMPLIANCE FILE UNICODE DECODE EXCEPTION in (two_stage_cmos_opamp_with_frequency_compensation/Pre-layout Simulation/Screenshots of Output/vout-ac-pm (2).PNG): 'utf-8' codec can't decode byte 0x89 in position 0: invalid start byte |
| 2021-10-24 16:33:14 - [ERROR] - SPDX COMPLIANCE FILE UNICODE DECODE EXCEPTION in (two_stage_cmos_opamp_with_frequency_compensation/Pre-layout Simulation/Screenshots of Output/Vout-AC-PM.PNG): 'utf-8' codec can't decode byte 0x89 in position 0: invalid start byte |
| 2021-10-24 16:33:14 - [ERROR] - SPDX COMPLIANCE FILE UNICODE DECODE EXCEPTION in (two_stage_cmos_opamp_with_frequency_compensation/Pre-layout Simulation/Screenshots of Output/vout-ac-magres.PNG): 'utf-8' codec can't decode byte 0x89 in position 0: invalid start byte |
| 2021-10-24 16:33:14 - [ERROR] - SPDX COMPLIANCE FILE UNICODE DECODE EXCEPTION in (two_stage_cmos_opamp_with_frequency_compensation/Pre-layout Simulation/Screenshots of Output/Vo-tran.PNG): 'utf-8' codec can't decode byte 0x89 in position 0: invalid start byte |
| 2021-10-24 16:33:14 - [ERROR] - SPDX COMPLIANCE FILE UNICODE DECODE EXCEPTION in (two_stage_cmos_opamp_with_frequency_compensation/Pre-layout Simulation/Screenshots of Output/Vout-AC-Phase-Res.PNG): 'utf-8' codec can't decode byte 0x89 in position 0: invalid start byte |
| 2021-10-24 16:33:14 - [ERROR] - SPDX COMPLIANCE FILE UNICODE DECODE EXCEPTION in (two_stage_cmos_opamp_with_frequency_compensation/Pre-layout Simulation/Screenshots of Output/vout-ac-phres.PNG): 'utf-8' codec can't decode byte 0x89 in position 0: invalid start byte |
| 2021-10-24 16:33:14 - [ERROR] - SPDX COMPLIANCE FILE UNICODE DECODE EXCEPTION in (two_stage_cmos_opamp_with_frequency_compensation/Post layout simulation/Transient Response/Vout-tran.PNG): 'utf-8' codec can't decode byte 0x89 in position 0: invalid start byte |
| 2021-10-24 16:33:14 - [ERROR] - SPDX COMPLIANCE FILE UNICODE DECODE EXCEPTION in (two_stage_cmos_opamp_with_frequency_compensation/Post layout simulation/Transient Response/Vo-trans.PNG): 'utf-8' codec can't decode byte 0x89 in position 0: invalid start byte |
| 2021-10-24 16:33:14 - [ERROR] - SPDX COMPLIANCE FILE UNICODE DECODE EXCEPTION in (two_stage_cmos_opamp_with_frequency_compensation/Post layout simulation/Transient Response/Vin-tran.PNG): 'utf-8' codec can't decode byte 0x89 in position 0: invalid start byte |
| 2021-10-24 16:33:14 - [ERROR] - SPDX COMPLIANCE FILE UNICODE DECODE EXCEPTION in (two_stage_cmos_opamp_with_frequency_compensation/Post layout simulation/Transient Response/opamp1-Trans-out.PNG): 'utf-8' codec can't decode byte 0x89 in position 0: invalid start byte |
| 2021-10-24 16:33:14 - [ERROR] - SPDX COMPLIANCE FILE UNICODE DECODE EXCEPTION in (two_stage_cmos_opamp_with_frequency_compensation/Post layout simulation/Transient Response/Opamp2_Tran_all.PNG): 'utf-8' codec can't decode byte 0x89 in position 0: invalid start byte |
| 2021-10-24 16:33:14 - [ERROR] - SPDX COMPLIANCE FILE UNICODE DECODE EXCEPTION in (two_stage_cmos_opamp_with_frequency_compensation/Post layout simulation/AC Response/Opamp2_AC_Res.PNG): 'utf-8' codec can't decode byte 0x89 in position 0: invalid start byte |
| 2021-10-24 16:33:14 - [ERROR] - SPDX COMPLIANCE FILE UNICODE DECODE EXCEPTION in (two_stage_cmos_opamp_with_frequency_compensation/Post layout simulation/AC Response/VOph-AC.PNG): 'utf-8' codec can't decode byte 0x89 in position 0: invalid start byte |
| 2021-10-24 16:33:14 - [ERROR] - SPDX COMPLIANCE FILE UNICODE DECODE EXCEPTION in (two_stage_cmos_opamp_with_frequency_compensation/Post layout simulation/AC Response/opamp2_AC-mag_res.PNG): 'utf-8' codec can't decode byte 0x89 in position 0: invalid start byte |
| 2021-10-24 16:33:14 - [ERROR] - SPDX COMPLIANCE FILE UNICODE DECODE EXCEPTION in (two_stage_cmos_opamp_with_frequency_compensation/Post layout simulation/AC Response/VOdb-AC.PNG): 'utf-8' codec can't decode byte 0x89 in position 0: invalid start byte |
| 2021-10-24 16:33:14 - [ERROR] - SPDX COMPLIANCE FILE UNICODE DECODE EXCEPTION in (two_stage_cmos_opamp_with_frequency_compensation/Post layout simulation/AC Response/opamp2-AC-Ph-Res.PNG): 'utf-8' codec can't decode byte 0x89 in position 0: invalid start byte |
| 2021-10-24 16:33:14 - [ERROR] - SPDX COMPLIANCE FILE UNICODE DECODE EXCEPTION in (two_stage_cmos_opamp_with_frequency_compensation/Post layout simulation/AC Response/opamp2-AC-PM.PNG): 'utf-8' codec can't decode byte 0x89 in position 0: invalid start byte |
| 2021-10-24 16:33:14 - [ERROR] - SPDX COMPLIANCE FILE UNICODE DECODE EXCEPTION in (two_stage_cmos_opamp_with_frequency_compensation/Post layout simulation/AC Response/opamp1-AC-Resp.PNG): 'utf-8' codec can't decode byte 0x89 in position 0: invalid start byte |
| 2021-10-24 16:33:14 - [ERROR] - SPDX COMPLIANCE FILE UNICODE DECODE EXCEPTION in (two_stage_cmos_opamp_with_frequency_compensation/Post layout simulation/All Layouts screenshots/OPAMP1.PNG): 'utf-8' codec can't decode byte 0x89 in position 0: invalid start byte |
| 2021-10-24 16:33:14 - [ERROR] - SPDX COMPLIANCE FILE UNICODE DECODE EXCEPTION in (two_stage_cmos_opamp_with_frequency_compensation/Post layout simulation/All Layouts screenshots/Mimcap.PNG): 'utf-8' codec can't decode byte 0x89 in position 0: invalid start byte |
| 2021-10-24 16:33:14 - [ERROR] - SPDX COMPLIANCE FILE UNICODE DECODE EXCEPTION in (two_stage_cmos_opamp_with_frequency_compensation/Post layout simulation/All Layouts screenshots/Resistor.PNG): 'utf-8' codec can't decode byte 0x89 in position 0: invalid start byte |
| 2021-10-24 16:33:14 - [ERROR] - SPDX COMPLIANCE FILE UNICODE DECODE EXCEPTION in (two_stage_cmos_opamp_with_frequency_compensation/Post layout simulation/All Layouts screenshots/Opamp2.PNG): 'utf-8' codec can't decode byte 0x89 in position 0: invalid start byte |
| 2021-10-24 16:33:14 - [WARNING] - {{SPDX COMPLIANCE CHECK FAILED}} Found 34 non-compliant file(s) with the SPDX Standard. |
| 2021-10-24 16:33:14 - [INFO] - SPDX COMPLIANCE: NON-COMPLIANT FILE(S) PREVIEW: ['two_stage_cmos_opamp_with_frequency_compensation/Makefile', 'two_stage_cmos_opamp_with_frequency_compensation/docs/environment.yml', 'two_stage_cmos_opamp_with_frequency_compensation/docs/Makefile', 'two_stage_cmos_opamp_with_frequency_compensation/docs/source/index.rst', 'two_stage_cmos_opamp_with_frequency_compensation/docs/source/conf.py', 'two_stage_cmos_opamp_with_frequency_compensation/verilog/dv/Makefile', 'two_stage_cmos_opamp_with_frequency_compensation/verilog/dv/mprj_por/mprj_por_tb.v', 'two_stage_cmos_opamp_with_frequency_compensation/verilog/dv/mprj_por/Makefile', 'two_stage_cmos_opamp_with_frequency_compensation/verilog/dv/mprj_por/mprj_por.c', 'two_stage_cmos_opamp_with_frequency_compensation/verilog/rtl/example_por.v', 'two_stage_cmos_opamp_with_frequency_compensation/verilog/rtl/uprj_analog_netlists.v', 'two_stage_cmos_opamp_with_frequency_compensation/verilog/rtl/user_analog_proj_example.v', 'two_stage_cmos_opamp_with_frequency_compensation/verilog/rtl/user_analog_project_wrapper.v', 'two_stage_cmos_opamp_with_frequency_compensation/mag/sky130A.tech', 'two_stage_cmos_opamp_with_frequency_compensation/mag/opamp2.ext'] |
| 2021-10-24 16:33:14 - [INFO] - For the full SPDX compliance report check: two_stage_cmos_opamp_with_frequency_compensation/jobs/mpw_precheck/c123b7d9-03e3-4a32-b399-6d4dfea99dbd/logs/spdx_compliance_report.log |
| 2021-10-24 16:33:14 - [INFO] - {{STEP UPDATE}} Executing Check 2 of 14: Manifest |
| 2021-10-24 16:33:15 - [INFO] - Caravel version matches, for the full report check: two_stage_cmos_opamp_with_frequency_compensation/jobs/mpw_precheck/c123b7d9-03e3-4a32-b399-6d4dfea99dbd/logs/manifest_check.log |
| 2021-10-24 16:33:15 - [INFO] - {{MANIFEST CHECKS PASSED}} Manifest Checks Passed. Caravel version matches. |
| 2021-10-24 16:33:15 - [INFO] - {{STEP UPDATE}} Executing Check 3 of 14: Makefile |
| 2021-10-24 16:33:15 - [INFO] - {{MAKEFILE CHECK PASSED}} Makefile valid. |
| 2021-10-24 16:33:15 - [INFO] - {{STEP UPDATE}} Executing Check 4 of 14: Default |
| 2021-10-24 16:33:15 - [INFO] - {{README DEFAULT CHECK PASSED}} Project 'README.md' was modified and is not identical to the default 'README.md' |
| 2021-10-24 16:33:15 - [INFO] - {{CONTENT DEFAULT CHECK PASSED}} Project 'gds' was modified and is not identical to the default 'gds' |
| 2021-10-24 16:33:15 - [INFO] - {{STEP UPDATE}} Executing Check 5 of 14: Documentation |
| 2021-10-24 16:33:15 - [INFO] - {{DOCUMENTATION CHECK PASSED}} Project documentation is appropriate. |
| 2021-10-24 16:33:15 - [INFO] - {{STEP UPDATE}} Executing Check 6 of 14: Consistency |
| 2021-10-24 16:33:15 - [INFO] - Trying to get file https://raw.githubusercontent.com/efabless/caravel/f80b2fea4aa53d68baec2160f6640b9e3b8d86e5/verilog/rtl/__user_analog_project_wrapper.v |
| 2021-10-24 16:33:15 - [INFO] - Got file https://raw.githubusercontent.com/efabless/caravel/f80b2fea4aa53d68baec2160f6640b9e3b8d86e5/verilog/rtl/__user_analog_project_wrapper.v |
| 2021-10-24 16:33:15 - [INFO] - Trying to get file https://raw.githubusercontent.com/efabless/caravel/f80b2fea4aa53d68baec2160f6640b9e3b8d86e5/verilog/rtl/defines.v |
| 2021-10-24 16:33:15 - [INFO] - Got file https://raw.githubusercontent.com/efabless/caravel/f80b2fea4aa53d68baec2160f6640b9e3b8d86e5/verilog/rtl/defines.v |
| 2021-10-24 16:33:16 - [INFO] - HIERARCHY CHECK PASSED: Module user_analog_project_wrapper is instantiated in caravan. |
| 2021-10-24 16:33:16 - [INFO] - COMPLEXITY CHECK PASSED: Netlist caravan contains at least 8 instances (39 instances). |
| 2021-10-24 16:33:16 - [INFO] - MODELING CHECK PASSED: Netlist caravan is structural. |
| 2021-10-24 16:33:16 - [INFO] - SUBMODULE HOOKS CHECK PASSED: All module ports for user_analog_project_wrapper are correctly connected in the top level netlist caravan. |
| 2021-10-24 16:33:16 - [INFO] - {{NETLIST CONSISTENCY CHECK PASSED}} caravan netlist passed all consistency checks. |
| 2021-10-24 16:33:16 - [INFO] - PORTS CHECK PASSED: Netlist user_analog_project_wrapper ports match the golden wrapper ports |
| 2021-10-24 16:33:16 - [INFO] - COMPLEXITY CHECK PASSED: Netlist user_analog_project_wrapper contains at least 1 instances (1 instances). |
| 2021-10-24 16:33:16 - [INFO] - MODELING CHECK PASSED: Netlist user_analog_project_wrapper is structural. |
| 2021-10-24 16:33:16 - [INFO] - LAYOUT CHECK PASSED: The GDS layout for user_analog_project_wrapper matches the provided structural netlist. |
| 2021-10-24 16:33:16 - [INFO] - {{NETLIST CONSISTENCY CHECK PASSED}} user_analog_project_wrapper netlist passed all consistency checks. |
| 2021-10-24 16:33:16 - [INFO] - {{CONSISTENCY CHECK PASSED}} The user netlist and the top netlist are valid. |
| 2021-10-24 16:33:16 - [INFO] - {{STEP UPDATE}} Executing Check 7 of 14: XOR |
| 2021-10-24 16:33:16 - [INFO] - Trying to get file https://raw.githubusercontent.com/efabless/caravel/f80b2fea4aa53d68baec2160f6640b9e3b8d86e5/gds/user_analog_project_wrapper_empty.gds.gz |
| 2021-10-24 16:33:16 - [INFO] - Got file https://raw.githubusercontent.com/efabless/caravel/f80b2fea4aa53d68baec2160f6640b9e3b8d86e5/gds/user_analog_project_wrapper_empty.gds.gz |
| 2021-10-24 16:33:19 - [INFO] - {XOR CHECK UPDATE} Total XOR differences: 0, for more details view two_stage_cmos_opamp_with_frequency_compensation/jobs/mpw_precheck/c123b7d9-03e3-4a32-b399-6d4dfea99dbd/outputs/user_analog_project_wrapper.xor.gds |
| 2021-10-24 16:33:19 - [INFO] - {{XOR CHECK PASSED}} The GDS file has no XOR violations. |
| 2021-10-24 16:33:19 - [INFO] - {{STEP UPDATE}} Executing Check 8 of 14: Magic DRC |
| 2021-10-24 16:33:20 - [INFO] - 0 DRC violations |
| 2021-10-24 16:33:20 - [INFO] - {{MAGIC DRC CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations. |
| 2021-10-24 16:33:20 - [INFO] - {{STEP UPDATE}} Executing Check 9 of 14: Klayout FEOL |
| 2021-10-24 16:33:22 - [INFO] - No DRC Violations found |
| 2021-10-24 16:33:22 - [INFO] - {{Klayout FEOL CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations. |
| 2021-10-24 16:33:22 - [INFO] - {{STEP UPDATE}} Executing Check 10 of 14: Klayout BEOL |
| 2021-10-24 16:33:25 - [INFO] - No DRC Violations found |
| 2021-10-24 16:33:25 - [INFO] - {{Klayout BEOL CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations. |
| 2021-10-24 16:33:25 - [INFO] - {{STEP UPDATE}} Executing Check 11 of 14: Klayout Offgrid |
| 2021-10-24 16:33:27 - [INFO] - No DRC Violations found |
| 2021-10-24 16:33:27 - [INFO] - {{Klayout Offgrid CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations. |
| 2021-10-24 16:33:27 - [INFO] - {{STEP UPDATE}} Executing Check 12 of 14: Klayout Metal Minimum Clear Area Density |
| 2021-10-24 16:33:28 - [INFO] - No DRC Violations found |
| 2021-10-24 16:33:28 - [INFO] - {{Klayout Metal Minimum Clear Area Density CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations. |
| 2021-10-24 16:33:28 - [INFO] - {{STEP UPDATE}} Executing Check 13 of 14: Klayout Pin Label Purposes Overlapping Drawing |
| 2021-10-24 16:33:30 - [INFO] - No DRC Violations found |
| 2021-10-24 16:33:30 - [INFO] - {{Klayout Pin Label Purposes Overlapping Drawing CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations. |
| 2021-10-24 16:33:30 - [INFO] - {{STEP UPDATE}} Executing Check 14 of 14: Klayout ZeroArea |
| 2021-10-24 16:33:31 - [INFO] - No DRC Violations found |
| 2021-10-24 16:33:31 - [INFO] - {{Klayout ZeroArea CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations. |
| 2021-10-24 16:33:31 - [INFO] - {{FINISH}} Executing Finished, the full log 'precheck.log' can be found in 'two_stage_cmos_opamp_with_frequency_compensation/jobs/mpw_precheck/c123b7d9-03e3-4a32-b399-6d4dfea99dbd/logs' |
| 2021-10-24 16:33:31 - [INFO] - {{SUCCESS}} All Checks Passed !!! |
