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foss-eda-tools / third_party / shuttle / sky130 / mpw-003 / slot-023 / 335948b82f827d1469f83aba7010f0187a830968
commit335948b82f827d1469f83aba7010f0187a830968[log] [tgz]
authorJeff DiCorpo <jeffdi@efabless.com>Wed Dec 29 05:43:31 2021 -0800
committerJeff DiCorpo <jeffdi@efabless.com>Wed Dec 29 05:43:31 2021 -0800
tree1cb021dc91f52fa390e7bbabe2f90f71c44bd3ab
parente7abdc8062034182161ec61b0c757ba3a1f8456d [diff]
final gds oasis
88 files changed
tree: 1cb021dc91f52fa390e7bbabe2f90f71c44bd3ab
  1. caravel/
  2. docs/
  3. gds/
  4. jobs/
  5. mag/
  6. netgen/
  7. oas/
  8. OPAMP_Layout_Files/
  9. openlane/
  10. Post layout simulation/
  11. Pre-layout Simulation/
  12. signoff/
  13. verilog/
  14. xschem/
  15. .gitignore
  16. CMOS OPAMP-SPECS-Madhuri Kadam.pdf
  17. info.yaml
  18. LICENSE
  19. Makefile
  20. README.md
README.md

Caravel Analog User

license

Two Stage CMOS OPAMP with Frequency Compensation

CMOS OPAMP is Basic building block of analog and Mixed signal circuits. It is used in many applications such as ADC, DAC and Instrumentation Amplifier. It basically amplifies the difference between two input signals.

Instumentation Amplifier: An Application Of CMOS OPAMP

Performance parameters of Bandgap Reference IP

Block Diagram of CMOS OPAMP IP

Downloading the files on your System

The files from this repository can be downloaded and used by the following commands :-

sudo apt install -y git

git clone https://github.com/MadhuriKadam9/Cmosopamp.git

Pre-Layout Simulation of CMOS OPAMP IP

1. Schematic of CMOS OPAMP IP designd in eSim

Install the eSim tool using this https://esim.fossee.in/downloads
Note: You can also refer to the eSim Spoken Tutorialwebsite https://spoken-tutorial.org/tutorial-search/?search_foss=eSim

2. Ngspice Simulation Results

Ngspice is an open source mixed-signal circuit simulator. To install Ngspice on Ubuntu, open terminal window and type :-

sudo apt-get install -y ngspice

After successful installation, to invoke Ngspice type the following command on the terminal window.

ngspice “circuit file to be simulated”

A) Transient Response of Two stage OPAMP

To get the transient response of two stage OPAMP run the following file in ngspice: Opamp_TRAN.cir.out

B) AC Response of Two stage OPAMP

To get the transient response of two stage OPAMP run the following file in ngspice: Opamp_AC.cir.out

Magnitude Response Vout-dB i.e. ADM

Phase Response Vout-Ph

Phase Margin Plot of Vout

Layout with Magic Tool

MAGIC Tool installation:

The Layout for the circuit was done using Magic Layout editor tool. To observe the layout, install magic using the following commands :-

sudo wget “http://opencircuitdesign.com/magic/archive/magic-8.3.122.tgz”

tar -xvzf magic-8.3.122.tgz

cd magic-8.3.122

sudo ./configure

sudo make

sudo make install

Resistor

After successful installation, To open Resistor layout in magic type following in terminal window:-

cd Cmosopamp/OPAMP_Layout_Files/

magic -T ../libs/sky130A.tech res.mag

Capacitor

To see capacitor layout give command magic -T ../libs/sky130A.tech mimcapt.mag

Single stage OPAMP

To see opamp1 layout give command magic -T ../libs/sky130A.tech opamp1.mag

Dual Stage OPAMP

To see opamp2 layout give command magic -T ../libs/sky130A.tech opamp2.mag

Post-Layout Simulation of CMOS OPAMP IP

Single Stage OPAMP

Transient Response

Run the following file in ngspice: opamp1_tran.spice

  1. Vinp, Vinm Waveforms

  2. Vo waveform

AC Response

Run the following file in ngspice: opamp1_ac.spice

  1. Magnitude Response i.e. VodB

  2. Phase Response i.e Vo-ph

  3. All AC Response of OPAMP1

Dual Stage OPAMP

Transient Response

Run the following file in ngspice: opamp2_tran.spice

  1. Vinp, Vinm Waveforms

  2. Vout waveform

AC Response

Run the following file in ngspice: opamp2_ac.spice

  1. Magnitude Response i.e. VodB

  2. Phase Response Vout-ph

  3. Phase Margin Plot Vout-PM

  4. All AC Response

Further Work

From the postlayout transient response of Two stage opamp it can be obsereved that the negative peak of vout is flattened. This results in reduction of overall voltage swing at the output. So with proper design this problem can be solved.

Contributors

  1. Mrs. Madhuri H. Kadam, Assistant Professor, Shree L. R. Tiwari college of Engineering, Mira Rd (E) - madhurib.saksham@gmail.com
  2. Kunal Ghosh, Co-Founder of VLSI System Design (VSD) Corp. Pvt. Ltd. - kunalpghosh@gmail.com

Acknowledgements

Kunal Ghosh, Co-Founder of VLSI System Design (VSD) Corp. Pvt. Ltd. - kunalpghosh@gmail.com