Add files via upload
diff --git a/openlane/user_proj_example/runs/user_proj_example/reports/cts/cts.min_max.rpt b/openlane/user_proj_example/runs/user_proj_example/reports/cts/cts.min_max.rpt
new file mode 100644
index 0000000..fed4af8
--- /dev/null
+++ b/openlane/user_proj_example/runs/user_proj_example/reports/cts/cts.min_max.rpt
@@ -0,0 +1,109 @@
+min_max_report
+Startpoint: io_in[1] (input port clocked by wb_clk_i)
+Endpoint: io_out[1] (output port clocked by wb_clk_i)
+Path Group: wb_clk_i
+Path Type: min
+
+Fanout     Cap    Slew   Delay    Time   Description
+-----------------------------------------------------------------------------
+                  0.00    0.00    0.00   clock wb_clk_i (rise edge)
+                          0.00    0.00   clock network delay (ideal)
+                          2.00    2.00 v input external delay
+                  0.01    0.00    2.00 v io_in[1] (in)
+     1    0.00                           io_in[1] (net)
+                  0.01    0.00    2.00 v input8/A (sky130_fd_sc_hd__clkbuf_2)
+                  0.09    0.14    2.14 v input8/X (sky130_fd_sc_hd__clkbuf_2)
+     3    0.02                           net8 (net)
+                  0.09    0.00    2.14 v _275_/A1 (sky130_fd_sc_hd__a31o_1)
+                  0.07    0.23    2.38 v _275_/X (sky130_fd_sc_hd__a31o_1)
+     1    0.01                           net24 (net)
+                  0.07    0.00    2.38 v output24/A (sky130_fd_sc_hd__clkbuf_2)
+                  0.08    0.16    2.54 v output24/X (sky130_fd_sc_hd__clkbuf_2)
+     1    0.02                           io_out[1] (net)
+                  0.08    0.00    2.54 v io_out[1] (out)
+                                  2.54   data arrival time
+
+                  0.00    0.00    0.00   clock wb_clk_i (rise edge)
+                          0.00    0.00   clock network delay (ideal)
+                          0.00    0.00   clock reconvergence pessimism
+                         -2.00   -2.00   output external delay
+                                 -2.00   data required time
+-----------------------------------------------------------------------------
+                                 -2.00   data required time
+                                 -2.54   data arrival time
+-----------------------------------------------------------------------------
+                                  4.54   slack (MET)
+
+
+Startpoint: io_in[2] (input port clocked by wb_clk_i)
+Endpoint: io_out[12] (output port clocked by wb_clk_i)
+Path Group: wb_clk_i
+Path Type: max
+
+Fanout     Cap    Slew   Delay    Time   Description
+-----------------------------------------------------------------------------
+                  0.00    0.00    0.00   clock wb_clk_i (rise edge)
+                          0.00    0.00   clock network delay (ideal)
+                          2.00    2.00 ^ input external delay
+                  0.02    0.00    2.00 ^ io_in[2] (in)
+     1    0.00                           io_in[2] (net)
+                  0.02    0.00    2.00 ^ input9/A (sky130_fd_sc_hd__buf_1)
+                  0.19    0.17    2.17 ^ input9/X (sky130_fd_sc_hd__buf_1)
+     1    0.02                           net9 (net)
+                  0.19    0.00    2.18 ^ _328_/A (sky130_fd_sc_hd__inv_2)
+                  0.06    0.07    2.25 v _328_/Y (sky130_fd_sc_hd__inv_2)
+     3    0.01                           _149_ (net)
+                  0.06    0.00    2.25 v _334_/B (sky130_fd_sc_hd__or4_1)
+                  0.13    0.57    2.82 v _334_/X (sky130_fd_sc_hd__or4_1)
+     4    0.01                           _155_ (net)
+                  0.13    0.00    2.82 v _185_/B_N (sky130_fd_sc_hd__or2b_1)
+                  0.07    0.21    3.03 ^ _185_/X (sky130_fd_sc_hd__or2b_1)
+     3    0.01                           _025_ (net)
+                  0.07    0.00    3.03 ^ _189_/A1_N (sky130_fd_sc_hd__a2bb2o_1)
+                  0.07    0.31    3.34 v _189_/X (sky130_fd_sc_hd__a2bb2o_1)
+     3    0.01                           _029_ (net)
+                  0.07    0.00    3.34 v _193_/B1 (sky130_fd_sc_hd__o22a_1)
+                  0.06    0.20    3.54 v _193_/X (sky130_fd_sc_hd__o22a_1)
+     2    0.01                           _033_ (net)
+                  0.06    0.00    3.54 v _206_/A (sky130_fd_sc_hd__or2_1)
+                  0.08    0.27    3.82 v _206_/X (sky130_fd_sc_hd__or2_1)
+     2    0.01                           _046_ (net)
+                  0.08    0.00    3.82 v _241_/A (sky130_fd_sc_hd__inv_2)
+                  0.06    0.08    3.90 ^ _241_/Y (sky130_fd_sc_hd__inv_2)
+     2    0.01                           _076_ (net)
+                  0.06    0.00    3.90 ^ _245_/A1 (sky130_fd_sc_hd__o21ai_2)
+                  0.08    0.09    3.99 v _245_/Y (sky130_fd_sc_hd__o21ai_2)
+     3    0.01                           _079_ (net)
+                  0.08    0.00    3.99 v _247_/A (sky130_fd_sc_hd__inv_2)
+                  0.05    0.07    4.06 ^ _247_/Y (sky130_fd_sc_hd__inv_2)
+     2    0.01                           _081_ (net)
+                  0.05    0.00    4.06 ^ _249_/A2 (sky130_fd_sc_hd__o21ai_2)
+                  0.08    0.07    4.13 v _249_/Y (sky130_fd_sc_hd__o21ai_2)
+     3    0.01                           _082_ (net)
+                  0.08    0.00    4.14 v _260_/B1 (sky130_fd_sc_hd__o21a_1)
+                  0.06    0.14    4.27 v _260_/X (sky130_fd_sc_hd__o21a_1)
+     2    0.01                           _091_ (net)
+                  0.06    0.00    4.27 v _270_/A3 (sky130_fd_sc_hd__o32a_1)
+                  0.07    0.30    4.58 v _270_/X (sky130_fd_sc_hd__o32a_1)
+     2    0.01                           _099_ (net)
+                  0.07    0.00    4.58 v _271_/B2 (sky130_fd_sc_hd__a2bb2oi_1)
+                  0.26    0.24    4.81 ^ _271_/Y (sky130_fd_sc_hd__a2bb2oi_1)
+     1    0.01                           net20 (net)
+                  0.26    0.00    4.82 ^ output20/A (sky130_fd_sc_hd__clkbuf_2)
+                  0.11    0.21    5.03 ^ output20/X (sky130_fd_sc_hd__clkbuf_2)
+     1    0.02                           io_out[12] (net)
+                  0.11    0.00    5.03 ^ io_out[12] (out)
+                                  5.03   data arrival time
+
+                  0.00   10.00   10.00   clock wb_clk_i (rise edge)
+                          0.00   10.00   clock network delay (ideal)
+                          0.00   10.00   clock reconvergence pessimism
+                         -2.00    8.00   output external delay
+                                  8.00   data required time
+-----------------------------------------------------------------------------
+                                  8.00   data required time
+                                 -5.03   data arrival time
+-----------------------------------------------------------------------------
+                                  2.97   slack (MET)
+
+
diff --git a/openlane/user_proj_example/runs/user_proj_example/reports/cts/cts.rpt b/openlane/user_proj_example/runs/user_proj_example/reports/cts/cts.rpt
new file mode 100644
index 0000000..44acd6c
--- /dev/null
+++ b/openlane/user_proj_example/runs/user_proj_example/reports/cts/cts.rpt
@@ -0,0 +1,2 @@
+check_report
+No paths found.
diff --git a/openlane/user_proj_example/runs/user_proj_example/reports/cts/cts.timing.rpt b/openlane/user_proj_example/runs/user_proj_example/reports/cts/cts.timing.rpt
new file mode 100644
index 0000000..8ce26df
--- /dev/null
+++ b/openlane/user_proj_example/runs/user_proj_example/reports/cts/cts.timing.rpt
@@ -0,0 +1,2 @@
+timing_report
+No paths found.
diff --git a/openlane/user_proj_example/runs/user_proj_example/reports/cts/cts_clock_skew.rpt b/openlane/user_proj_example/runs/user_proj_example/reports/cts/cts_clock_skew.rpt
new file mode 100644
index 0000000..ad1f1f8
--- /dev/null
+++ b/openlane/user_proj_example/runs/user_proj_example/reports/cts/cts_clock_skew.rpt
@@ -0,0 +1 @@
+SKIPPED!
\ No newline at end of file
diff --git a/openlane/user_proj_example/runs/user_proj_example/reports/cts/cts_tns.rpt b/openlane/user_proj_example/runs/user_proj_example/reports/cts/cts_tns.rpt
new file mode 100644
index 0000000..8574118
--- /dev/null
+++ b/openlane/user_proj_example/runs/user_proj_example/reports/cts/cts_tns.rpt
@@ -0,0 +1,2 @@
+tns_report
+tns 0.00
diff --git a/openlane/user_proj_example/runs/user_proj_example/reports/cts/cts_wns.rpt b/openlane/user_proj_example/runs/user_proj_example/reports/cts/cts_wns.rpt
new file mode 100644
index 0000000..5c25f79
--- /dev/null
+++ b/openlane/user_proj_example/runs/user_proj_example/reports/cts/cts_wns.rpt
@@ -0,0 +1,2 @@
+wns_report
+wns 0.00
diff --git a/openlane/user_proj_example/runs/user_proj_example/reports/final_summary_report.csv b/openlane/user_proj_example/runs/user_proj_example/reports/final_summary_report.csv
new file mode 100644
index 0000000..4ff7a0c
--- /dev/null
+++ b/openlane/user_proj_example/runs/user_proj_example/reports/final_summary_report.csv
@@ -0,0 +1,2 @@
+,design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,suggested_clock_frequency,suggested_clock_period,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GLB_RT_ADJUSTMENT,STD_CELL_LIBRARY,CELL_PAD,DIODE_INSERTION_STRATEGY
+0,/project/openlane/user_proj_example,user_proj_example,user_proj_example,flow_completed,0h6m4s,0h3m18s,1503.7037037037037,0.54,751.8518518518518,0.44,663.52,406,0,0,0,0,0,0,0,0,0,0,-1,13895,2345,0.0,0.0,0.0,-0.18,-1.03,0.0,0.0,0.0,-0.61,-5.43,7959291.0,0.08,0.52,0.32,0.18,0.01,-1,318,1183,67,932,0,0,0,267,0,0,0,0,0,0,0,4,16,19,14,424,7276,0,7700,90.66183136899366,11.03,10,AREA 0,5,50,1,153.6,153.18,0.55,0.0,sky130_fd_sc_hd,4,4
diff --git a/openlane/user_proj_example/runs/user_proj_example/reports/floorplan/3-verilog2def.core_area.rpt b/openlane/user_proj_example/runs/user_proj_example/reports/floorplan/3-verilog2def.core_area.rpt
new file mode 100644
index 0000000..9c675ef
--- /dev/null
+++ b/openlane/user_proj_example/runs/user_proj_example/reports/floorplan/3-verilog2def.core_area.rpt
@@ -0,0 +1 @@
+5.5200000000000005 10.88 894.48 589.12
diff --git a/openlane/user_proj_example/runs/user_proj_example/reports/floorplan/3-verilog2def.die_area.rpt b/openlane/user_proj_example/runs/user_proj_example/reports/floorplan/3-verilog2def.die_area.rpt
new file mode 100644
index 0000000..294f183
--- /dev/null
+++ b/openlane/user_proj_example/runs/user_proj_example/reports/floorplan/3-verilog2def.die_area.rpt
@@ -0,0 +1 @@
+0 0 900 600
diff --git a/openlane/user_proj_example/runs/user_proj_example/reports/floorplan/7-pdn.pga.rpt b/openlane/user_proj_example/runs/user_proj_example/reports/floorplan/7-pdn.pga.rpt
new file mode 100644
index 0000000..bbcd015
--- /dev/null
+++ b/openlane/user_proj_example/runs/user_proj_example/reports/floorplan/7-pdn.pga.rpt
@@ -0,0 +1,832 @@
+Instance name,  X location,  Y location,  Voltage 
+PHY_420, 5.4, 584.8, 1.8
+PHY_422, 5.4, 584.8, 1.8
+PHY_421, 891, 584.8, 1.8
+PHY_423, 891, 584.8, 1.8
+PHY_416, 5.4, 579.36, 1.8
+PHY_418, 5.4, 579.36, 1.8
+PHY_417, 891, 579.36, 1.8
+PHY_419, 891, 579.36, 1.8
+PHY_412, 5.4, 573.92, 1.8
+PHY_414, 5.4, 573.92, 1.8
+PHY_413, 891, 573.92, 1.8
+PHY_415, 891, 573.92, 1.8
+PHY_408, 5.4, 568.48, 1.8
+PHY_410, 5.4, 568.48, 1.8
+PHY_409, 891, 568.48, 1.8
+PHY_411, 891, 568.48, 1.8
+PHY_404, 5.4, 563.04, 1.8
+PHY_406, 5.4, 563.04, 1.8
+PHY_405, 891, 563.04, 1.8
+PHY_407, 891, 563.04, 1.8
+PHY_400, 5.4, 557.6, 1.8
+PHY_402, 5.4, 557.6, 1.8
+PHY_401, 891, 557.6, 1.8
+PHY_403, 891, 557.6, 1.8
+PHY_396, 5.4, 552.16, 1.8
+PHY_398, 5.4, 552.16, 1.8
+PHY_397, 891, 552.16, 1.8
+PHY_399, 891, 552.16, 1.8
+PHY_392, 5.4, 546.72, 1.8
+PHY_394, 5.4, 546.72, 1.8
+PHY_393, 891, 546.72, 1.8
+PHY_395, 891, 546.72, 1.8
+PHY_388, 5.4, 541.28, 1.8
+PHY_390, 5.4, 541.28, 1.8
+PHY_389, 891, 541.28, 1.8
+PHY_391, 891, 541.28, 1.8
+PHY_384, 5.4, 535.84, 1.8
+PHY_386, 5.4, 535.84, 1.8
+PHY_385, 891, 535.84, 1.8
+PHY_387, 891, 535.84, 1.8
+PHY_380, 5.4, 530.4, 1.8
+PHY_382, 5.4, 530.4, 1.8
+PHY_381, 891, 530.4, 1.8
+PHY_383, 891, 530.4, 1.8
+PHY_376, 5.4, 524.96, 1.8
+PHY_378, 5.4, 524.96, 1.8
+PHY_377, 891, 524.96, 1.8
+PHY_379, 891, 524.96, 1.8
+PHY_372, 5.4, 519.52, 1.8
+PHY_374, 5.4, 519.52, 1.8
+PHY_373, 891, 519.52, 1.8
+PHY_375, 891, 519.52, 1.8
+PHY_368, 5.4, 514.08, 1.8
+PHY_370, 5.4, 514.08, 1.8
+PHY_369, 891, 514.08, 1.8
+PHY_371, 891, 514.08, 1.8
+PHY_364, 5.4, 508.64, 1.8
+PHY_366, 5.4, 508.64, 1.8
+PHY_365, 891, 508.64, 1.8
+PHY_367, 891, 508.64, 1.8
+PHY_360, 5.4, 503.2, 1.8
+PHY_362, 5.4, 503.2, 1.8
+PHY_361, 891, 503.2, 1.8
+PHY_363, 891, 503.2, 1.8
+PHY_356, 5.4, 497.76, 1.8
+PHY_358, 5.4, 497.76, 1.8
+PHY_357, 891, 497.76, 1.8
+PHY_359, 891, 497.76, 1.8
+PHY_352, 5.4, 492.32, 1.8
+PHY_354, 5.4, 492.32, 1.8
+PHY_353, 891, 492.32, 1.8
+PHY_355, 891, 492.32, 1.8
+PHY_348, 5.4, 486.88, 1.8
+PHY_350, 5.4, 486.88, 1.8
+PHY_349, 891, 486.88, 1.8
+PHY_351, 891, 486.88, 1.8
+PHY_344, 5.4, 481.44, 1.8
+PHY_346, 5.4, 481.44, 1.8
+PHY_345, 891, 481.44, 1.8
+PHY_347, 891, 481.44, 1.8
+PHY_340, 5.4, 476, 1.8
+PHY_342, 5.4, 476, 1.8
+PHY_341, 891, 476, 1.8
+PHY_343, 891, 476, 1.8
+PHY_336, 5.4, 470.56, 1.8
+PHY_338, 5.4, 470.56, 1.8
+PHY_337, 891, 470.56, 1.8
+PHY_339, 891, 470.56, 1.8
+PHY_332, 5.4, 465.12, 1.8
+PHY_334, 5.4, 465.12, 1.8
+PHY_333, 891, 465.12, 1.8
+PHY_335, 891, 465.12, 1.8
+PHY_328, 5.4, 459.68, 1.8
+PHY_330, 5.4, 459.68, 1.8
+PHY_329, 891, 459.68, 1.8
+PHY_331, 891, 459.68, 1.8
+PHY_324, 5.4, 454.24, 1.8
+PHY_326, 5.4, 454.24, 1.8
+PHY_325, 891, 454.24, 1.8
+PHY_327, 891, 454.24, 1.8
+PHY_320, 5.4, 448.8, 1.8
+PHY_322, 5.4, 448.8, 1.8
+PHY_321, 891, 448.8, 1.8
+PHY_323, 891, 448.8, 1.8
+PHY_316, 5.4, 443.36, 1.8
+PHY_318, 5.4, 443.36, 1.8
+PHY_317, 891, 443.36, 1.8
+PHY_319, 891, 443.36, 1.8
+PHY_312, 5.4, 437.92, 1.8
+PHY_314, 5.4, 437.92, 1.8
+PHY_313, 891, 437.92, 1.8
+PHY_315, 891, 437.92, 1.8
+PHY_308, 5.4, 432.48, 1.8
+PHY_310, 5.4, 432.48, 1.8
+PHY_309, 891, 432.48, 1.8
+PHY_311, 891, 432.48, 1.8
+PHY_304, 5.4, 427.04, 1.8
+PHY_306, 5.4, 427.04, 1.8
+PHY_305, 891, 427.04, 1.8
+PHY_307, 891, 427.04, 1.8
+PHY_300, 5.4, 421.6, 1.8
+PHY_302, 5.4, 421.6, 1.8
+PHY_301, 891, 421.6, 1.8
+PHY_303, 891, 421.6, 1.8
+PHY_296, 5.4, 416.16, 1.8
+PHY_298, 5.4, 416.16, 1.8
+PHY_297, 891, 416.16, 1.8
+PHY_299, 891, 416.16, 1.8
+PHY_292, 5.4, 410.72, 1.8
+PHY_294, 5.4, 410.72, 1.8
+PHY_293, 891, 410.72, 1.8
+PHY_295, 891, 410.72, 1.8
+PHY_288, 5.4, 405.28, 1.8
+PHY_290, 5.4, 405.28, 1.8
+PHY_289, 891, 405.28, 1.8
+PHY_291, 891, 405.28, 1.8
+PHY_284, 5.4, 399.84, 1.8
+PHY_286, 5.4, 399.84, 1.8
+PHY_285, 891, 399.84, 1.8
+PHY_287, 891, 399.84, 1.8
+PHY_280, 5.4, 394.4, 1.8
+PHY_282, 5.4, 394.4, 1.8
+PHY_281, 891, 394.4, 1.8
+PHY_283, 891, 394.4, 1.8
+PHY_276, 5.4, 388.96, 1.8
+PHY_278, 5.4, 388.96, 1.8
+PHY_277, 891, 388.96, 1.8
+PHY_279, 891, 388.96, 1.8
+PHY_272, 5.4, 383.52, 1.8
+PHY_274, 5.4, 383.52, 1.8
+PHY_273, 891, 383.52, 1.8
+PHY_275, 891, 383.52, 1.8
+PHY_268, 5.4, 378.08, 1.8
+PHY_270, 5.4, 378.08, 1.8
+PHY_269, 891, 378.08, 1.8
+PHY_271, 891, 378.08, 1.8
+PHY_264, 5.4, 372.64, 1.8
+PHY_266, 5.4, 372.64, 1.8
+PHY_265, 891, 372.64, 1.8
+PHY_267, 891, 372.64, 1.8
+PHY_260, 5.4, 367.2, 1.8
+PHY_262, 5.4, 367.2, 1.8
+PHY_261, 891, 367.2, 1.8
+PHY_263, 891, 367.2, 1.8
+PHY_256, 5.4, 361.76, 1.8
+PHY_258, 5.4, 361.76, 1.8
+PHY_257, 891, 361.76, 1.8
+PHY_259, 891, 361.76, 1.8
+PHY_252, 5.4, 356.32, 1.8
+PHY_254, 5.4, 356.32, 1.8
+PHY_253, 891, 356.32, 1.8
+PHY_255, 891, 356.32, 1.8
+PHY_248, 5.4, 350.88, 1.8
+PHY_250, 5.4, 350.88, 1.8
+PHY_249, 891, 350.88, 1.8
+PHY_251, 891, 350.88, 1.8
+PHY_244, 5.4, 345.44, 1.8
+PHY_246, 5.4, 345.44, 1.8
+PHY_245, 891, 345.44, 1.8
+PHY_247, 891, 345.44, 1.8
+PHY_240, 5.4, 340, 1.8
+PHY_242, 5.4, 340, 1.8
+PHY_241, 891, 340, 1.8
+PHY_243, 891, 340, 1.8
+PHY_236, 5.4, 334.56, 1.8
+PHY_238, 5.4, 334.56, 1.8
+PHY_237, 891, 334.56, 1.8
+PHY_239, 891, 334.56, 1.8
+PHY_232, 5.4, 329.12, 1.8
+PHY_234, 5.4, 329.12, 1.8
+PHY_233, 891, 329.12, 1.8
+PHY_235, 891, 329.12, 1.8
+PHY_228, 5.4, 323.68, 1.8
+PHY_230, 5.4, 323.68, 1.8
+PHY_229, 891, 323.68, 1.8
+PHY_231, 891, 323.68, 1.8
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diff --git a/openlane/user_proj_example/runs/user_proj_example/reports/klayout/34-klayout.xor.rpt b/openlane/user_proj_example/runs/user_proj_example/reports/klayout/34-klayout.xor.rpt
new file mode 100644
index 0000000..a9e61aa
--- /dev/null
+++ b/openlane/user_proj_example/runs/user_proj_example/reports/klayout/34-klayout.xor.rpt
@@ -0,0 +1 @@
+Total XOR differences = 61638
\ No newline at end of file
diff --git a/openlane/user_proj_example/runs/user_proj_example/reports/klayout/35-klayout.xor.rpt b/openlane/user_proj_example/runs/user_proj_example/reports/klayout/35-klayout.xor.rpt
new file mode 100644
index 0000000..a9e61aa
--- /dev/null
+++ b/openlane/user_proj_example/runs/user_proj_example/reports/klayout/35-klayout.xor.rpt
@@ -0,0 +1 @@
+Total XOR differences = 61638
\ No newline at end of file
diff --git a/openlane/user_proj_example/runs/user_proj_example/reports/magic/38-magic.drc b/openlane/user_proj_example/runs/user_proj_example/reports/magic/38-magic.drc
new file mode 100644
index 0000000..b25b903
--- /dev/null
+++ b/openlane/user_proj_example/runs/user_proj_example/reports/magic/38-magic.drc
@@ -0,0 +1,5 @@
+user_proj_example
+----------------------------------------
+[INFO]: COUNT: 0
+[INFO]: Should be divided by 3 or 4
+
diff --git a/openlane/user_proj_example/runs/user_proj_example/reports/magic/38-magic.drc.klayout.xml b/openlane/user_proj_example/runs/user_proj_example/reports/magic/38-magic.drc.klayout.xml
new file mode 100644
index 0000000..8cce75a
--- /dev/null
+++ b/openlane/user_proj_example/runs/user_proj_example/reports/magic/38-magic.drc.klayout.xml
@@ -0,0 +1,10 @@
+<?xml version="1.0" ?>
+<report-database>
+    <categories/>
+    <cells>
+        <cell>
+            <name>user_proj_example</name>
+        </cell>
+    </cells>
+    <items/>
+</report-database>
diff --git a/openlane/user_proj_example/runs/user_proj_example/reports/magic/38-magic.drc.rdb b/openlane/user_proj_example/runs/user_proj_example/reports/magic/38-magic.drc.rdb
new file mode 100644
index 0000000..a586234
--- /dev/null
+++ b/openlane/user_proj_example/runs/user_proj_example/reports/magic/38-magic.drc.rdb
@@ -0,0 +1,2 @@
+$user_proj_example
+ 100