commit 1ea6f5669c7145760c65b78bdaff2a90e49f1413
author mustafaallabbad <69271910+mustafaallabbad@users.noreply.github.com> Tue Oct 26 19:48:43 2021 +0200
committer GitHub <noreply@github.com> Tue Oct 26 19:48:43 2021 +0200
tree 2e96d50154ec0cbcc99716fcdcfa6dc5ee470387
parent d1f3a9b996b02cd5a88815e74e1f1a8bd3484346

Update README.md

README.md

diff --git a/README.md b/README.md
index 678a247..89cb510 100644
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+++ b/README.md
@@ -63,7 +63,7 @@
 When VDD varies from 0 to 2.3v
 ![Image of LDO_Transient](https://github.com/mabrains/Analog_blocks/blob/main/Analog_Blocks/LDO/Images/LDO_v2/tran02.3v.png)
 When VDD varies from 2 to 3v
-![Image of LDO_Transient](https://github.com/mabrains/Analog_blocks/blob/main/Analog_Blocks/LDO/Images/LDO_v2/line_trantran2v3v.png)
+![Image of LDO_Transient](https://github.com/mabrains/Analog_blocks/blob/main/Analog_Blocks/LDO/Images/LDO_v2/line_tran_2v3v.png)
 
 ## Load Transient 
 The load is varied from 0.1mA to 10mA where the load is modeled as current source varied as PWL source where the output voltage suffers from under shoot of 40mV due to change of load current from 0.1mA to 10mA in 10uS then it settles back to its original value so we used this analysis to measure the load regulation.