Update yonga_lz4_decoder_controller.v
diff --git a/verilog/rtl/yonga_lz4_decoder_controller.v b/verilog/rtl/yonga_lz4_decoder_controller.v
index 0feb9d7..02c1ad3 100644
--- a/verilog/rtl/yonga_lz4_decoder_controller.v
+++ b/verilog/rtl/yonga_lz4_decoder_controller.v
@@ -1,6 +1,6 @@
`timescale 1ns / 1ps
// =====================================================================================
-// (C) COPYRIGHT 2016 YongaTek (Yonga Technology Microelectronics)
+// (C) COPYRIGHT 2021 YongaTek (Yonga Technology Microelectronics)
// All rights reserved.
// This file contains confidential and proprietary information of YongaTek and
// is protected under international copyright and other intellectual property laws.
