| --- |
| project: |
| description: "A DMA Controller using AXI4 interface implemented using Spinal HDL" |
| foundry: "SkyWater" |
| git_url: "https://github.com/pwang7/caravel_project_example.git" |
| organization: "DatenLord" |
| organization_url: "https://datenlord.io" |
| owner: "Pu Wang" |
| process: "SKY130" |
| project_name: "AXI-DMA" |
| project_id: "00000000" |
| tags: |
| - "DMA Controller" |
| - "AXI" |
| category: "Test Harness" |
| top_level_netlist: "caravel/verilog/gl/caravel.v" |
| user_level_netlist: "verilog/gl/user_project_wrapper.v" |
| version: "0.1" |
| cover_image: "docs/source/_static/caravel_harness.png" |
