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foss-eda-tools / third_party / shuttle / sky130 / mpw-001 / slot-040 / c5265b80121a1cfca92cd2fdea7bdc375fb860bd
commitc5265b80121a1cfca92cd2fdea7bdc375fb860bd[log] [tgz]
authorTim Edwards <tim@opencircuitdesign.com>Fri Sep 25 17:08:59 2020 -0400
committerTim Edwards <tim@opencircuitdesign.com>Fri Sep 25 17:08:59 2020 -0400
treed9521ddc48757c63709e36331f1574f2cdd23870
parentef8312e0e966922a17c0d76b5a1e1f608703c6f3 [diff]
Corrected some things from the initial pass of removing unused GPIO
signals and analog signals, and converting from EFS8A to sky130A.
Close to being able to simulate, with some hand-editing of the
standard cell library files.
17 files changed
tree: d9521ddc48757c63709e36331f1574f2cdd23870
  1. doc/
  2. verilog/
  3. README.md
README.md

CIIC Harness (Phase 1)

A template SoC for Google SKY130 free shuttles. It is still WIP. The current SoC architecture is given below.

Managment SoC

The managment SoC runs firmware taht can be used to:

  • Configure Mega Project I/O pads
  • Observe and control Mega Project signals (through on-chip logic analyzer probes)
  • Control the Mega Project power supply

The memory map of the management SoC is given below

Mega Project Area

This is the user space. It has limitted silicon area (???) as well as a fixed number of I/O pads (???). The repoo contains a sample mega project that contains a binary 32-bit up counter.

The firmware running on the Management Area SoC, configures the I/O pads used by the counter and uses the logic probes to observe/control the counter. Three firmware examples are provided:

  1. Configure the Mega Project I/O pads as o/p. Observe the counter value in the testbench: IO_Ports Test.
  2. Configure the Mega Project I/O pads as o/p. Use the Chip LA to load the counter and observe the o/p till it reaches 500: LA_Test1.
  3. Configure the Mega Project I/O pads as o/p. Use the Chip LA to control the clock source and reset signals and observe the counter value for five clock cylcles: LA_Test2.