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Tim Edwards581068f2020-11-19 12:45:25 -05001// `default_nettype none
Tim Edwards9eda80d2020-10-08 21:36:44 -04002module mprj_io #(
3 parameter AREA1PADS = 18 // Highest numbered pad in area 1
4) (
5 inout vddio,
6 inout vssio,
7 inout vdda,
8 inout vssa,
9 inout vccd,
10 inout vssd,
11
12 inout vdda1,
13 inout vdda2,
14 inout vssa1,
15 inout vssa2,
16 inout vccd1,
17 inout vccd2,
18 inout vssd1,
19 inout vssd2,
20
Tim Edwards04ba17f2020-10-02 22:27:50 -040021 input vddio_q,
22 input vssio_q,
23 input analog_a,
24 input analog_b,
Tim Edwards44bab472020-10-04 22:09:54 -040025 input porb_h,
Tim Edwards44bab472020-10-04 22:09:54 -040026 inout [`MPRJ_IO_PADS-1:0] io,
Tim Edwards04ba17f2020-10-02 22:27:50 -040027 input [`MPRJ_IO_PADS-1:0] io_out,
Tim Edwards44bab472020-10-04 22:09:54 -040028 input [`MPRJ_IO_PADS-1:0] oeb,
shalan0d14e6e2020-08-31 16:50:48 +020029 input [`MPRJ_IO_PADS-1:0] hldh_n,
Tim Edwards04ba17f2020-10-02 22:27:50 -040030 input [`MPRJ_IO_PADS-1:0] enh,
shalan0d14e6e2020-08-31 16:50:48 +020031 input [`MPRJ_IO_PADS-1:0] inp_dis,
32 input [`MPRJ_IO_PADS-1:0] ib_mode_sel,
Tim Edwards04ba17f2020-10-02 22:27:50 -040033 input [`MPRJ_IO_PADS-1:0] vtrip_sel,
34 input [`MPRJ_IO_PADS-1:0] slow_sel,
35 input [`MPRJ_IO_PADS-1:0] holdover,
shalan0d14e6e2020-08-31 16:50:48 +020036 input [`MPRJ_IO_PADS-1:0] analog_en,
37 input [`MPRJ_IO_PADS-1:0] analog_sel,
38 input [`MPRJ_IO_PADS-1:0] analog_pol,
39 input [`MPRJ_IO_PADS*3-1:0] dm,
Tim Edwards581068f2020-11-19 12:45:25 -050040 output [`MPRJ_IO_PADS-1:0] io_in,
41 inout [`MPRJ_IO_PADS-8:0] analog_io
shalan0d14e6e2020-08-31 16:50:48 +020042);
Tim Edwards9eda80d2020-10-08 21:36:44 -040043
44 wire [`MPRJ_IO_PADS-1:0] loop1_io;
Tim Edwards581068f2020-11-19 12:45:25 -050045 wire [6:0] no_connect;
Tim Edwards9eda80d2020-10-08 21:36:44 -040046
Ahmed Ghazydf4dd882020-11-25 18:38:42 +020047 sky130_ef_io__gpiov2_pad_wrapped area1_io_pad [AREA1PADS - 1:0] (
Tim Edwards9eda80d2020-10-08 21:36:44 -040048 `USER1_ABUTMENT_PINS
49 `ifndef TOP_ROUTING
Tim Edwards4c733352020-10-12 16:32:36 -040050 .PAD(io[AREA1PADS - 1:0]),
Tim Edwards9eda80d2020-10-08 21:36:44 -040051 `endif
Tim Edwards4c733352020-10-12 16:32:36 -040052 .OUT(io_out[AREA1PADS - 1:0]),
53 .OE_N(oeb[AREA1PADS - 1:0]),
54 .HLD_H_N(hldh_n[AREA1PADS - 1:0]),
55 .ENABLE_H(enh[AREA1PADS - 1:0]),
56 .ENABLE_INP_H(loop1_io[AREA1PADS - 1:0]),
57 .ENABLE_VDDA_H(porb_h),
58 .ENABLE_VSWITCH_H(vssio),
59 .ENABLE_VDDIO(vccd),
60 .INP_DIS(inp_dis[AREA1PADS - 1:0]),
61 .IB_MODE_SEL(ib_mode_sel[AREA1PADS - 1:0]),
62 .VTRIP_SEL(vtrip_sel[AREA1PADS - 1:0]),
63 .SLOW(slow_sel[AREA1PADS - 1:0]),
64 .HLD_OVR(holdover[AREA1PADS - 1:0]),
65 .ANALOG_EN(analog_en[AREA1PADS - 1:0]),
66 .ANALOG_SEL(analog_sel[AREA1PADS - 1:0]),
67 .ANALOG_POL(analog_pol[AREA1PADS - 1:0]),
68 .DM(dm[AREA1PADS*3 - 1:0]),
69 .PAD_A_NOESD_H(),
Tim Edwards581068f2020-11-19 12:45:25 -050070 .PAD_A_ESD_0_H({analog_io[AREA1PADS - 8:0], no_connect}),
Tim Edwards4c733352020-10-12 16:32:36 -040071 .PAD_A_ESD_1_H(),
72 .IN(io_in[AREA1PADS - 1:0]),
73 .IN_H(),
74 .TIE_HI_ESD(),
75 .TIE_LO_ESD(loop1_io[AREA1PADS - 1:0])
Tim Edwards9eda80d2020-10-08 21:36:44 -040076 );
77
Ahmed Ghazydf4dd882020-11-25 18:38:42 +020078 sky130_ef_io__gpiov2_pad_wrapped area2_io_pad [`MPRJ_IO_PADS - AREA1PADS - 1:0] (
Tim Edwards9eda80d2020-10-08 21:36:44 -040079 `USER2_ABUTMENT_PINS
80 `ifndef TOP_ROUTING
Tim Edwards4c733352020-10-12 16:32:36 -040081 .PAD(io[`MPRJ_IO_PADS - 1:AREA1PADS]),
Tim Edwards9eda80d2020-10-08 21:36:44 -040082 `endif
Tim Edwards4c733352020-10-12 16:32:36 -040083 .OUT(io_out[`MPRJ_IO_PADS - 1:AREA1PADS]),
84 .OE_N(oeb[`MPRJ_IO_PADS - 1:AREA1PADS]),
85 .HLD_H_N(hldh_n[`MPRJ_IO_PADS - 1:AREA1PADS]),
86 .ENABLE_H(enh[`MPRJ_IO_PADS - 1:AREA1PADS]),
87 .ENABLE_INP_H(loop1_io[`MPRJ_IO_PADS - 1:AREA1PADS]),
88 .ENABLE_VDDA_H(porb_h),
89 .ENABLE_VSWITCH_H(vssio),
90 .ENABLE_VDDIO(vccd),
91 .INP_DIS(inp_dis[`MPRJ_IO_PADS - 1:AREA1PADS]),
92 .IB_MODE_SEL(ib_mode_sel[`MPRJ_IO_PADS - 1:AREA1PADS]),
93 .VTRIP_SEL(vtrip_sel[`MPRJ_IO_PADS - 1:AREA1PADS]),
94 .SLOW(slow_sel[`MPRJ_IO_PADS - 1:AREA1PADS]),
95 .HLD_OVR(holdover[`MPRJ_IO_PADS - 1:AREA1PADS]),
96 .ANALOG_EN(analog_en[`MPRJ_IO_PADS - 1:AREA1PADS]),
97 .ANALOG_SEL(analog_sel[`MPRJ_IO_PADS - 1:AREA1PADS]),
98 .ANALOG_POL(analog_pol[`MPRJ_IO_PADS - 1:AREA1PADS]),
99 .DM(dm[`MPRJ_IO_PADS*3 - 1:AREA1PADS*3]),
100 .PAD_A_NOESD_H(),
Tim Edwards581068f2020-11-19 12:45:25 -0500101 .PAD_A_ESD_0_H(analog_io[`MPRJ_IO_PADS - 8:AREA1PADS - 7]),
Tim Edwards4c733352020-10-12 16:32:36 -0400102 .PAD_A_ESD_1_H(),
103 .IN(io_in[`MPRJ_IO_PADS - 1:AREA1PADS]),
104 .IN_H(),
105 .TIE_HI_ESD(),
106 .TIE_LO_ESD(loop1_io[`MPRJ_IO_PADS - 1:AREA1PADS])
Tim Edwards9eda80d2020-10-08 21:36:44 -0400107 );
shalan0d14e6e2020-08-31 16:50:48 +0200108
Tim Edwards04ba17f2020-10-02 22:27:50 -0400109endmodule
Tim Edwards581068f2020-11-19 12:45:25 -0500110// `default_nettype wire