Updated storage area
- Now has 2 blocks; one rw and one ro
diff --git a/verilog/dv/caravel/defs.h b/verilog/dv/caravel/defs.h
index 0aba014..2402f47 100644
--- a/verilog/dv/caravel/defs.h
+++ b/verilog/dv/caravel/defs.h
@@ -13,12 +13,9 @@
extern uint32_t flashio_worker_end;
// Storage area (MGMT: 0x0100_0000, User: 0x0200_0000)
-#define reg_mgmt_block0 (*(volatile uint32_t*)0x01000000)
-#define reg_mgmt_block1 (*(volatile uint32_t*)0x01100000)
-#define reg_user_block0 (*(volatile uint32_t*)0x02000000)
-#define reg_user_block1 (*(volatile uint32_t*)0x02100000)
-#define reg_user_block2 (*(volatile uint32_t*)0x02200000)
-#define reg_user_block3 (*(volatile uint32_t*)0x02300000)
+#define reg_rw_block0 (*(volatile uint32_t*)0x01000000)
+#define reg_rw_block1 (*(volatile uint32_t*)0x01100000)
+#define reg_ro_block0 (*(volatile uint32_t*)0x02000000)
// UART (0x2000_0000)
#define reg_uart_clkdiv (*(volatile uint32_t*)0x20000000)
