commit ffe6cad2127dd58ff204be0f2c9452bf87c00c8f
author Manar <manarabdelatty@aucegypt.edu> Mon Nov 09 19:09:04 2020 +0200
committer Manar <manarabdelatty@aucegypt.edu> Mon Nov 09 19:09:04 2020 +0200
tree 38f71d835e49770c93bab498b9716b3820347c59
parent e5ac00f49d9b6bc2062e18b42d6907274f641551

Updated storage area

- Now has 2 blocks; one rw and one ro

verilog/dv/caravel/defs.h

diff --git a/verilog/dv/caravel/defs.h b/verilog/dv/caravel/defs.h
index 0aba014..2402f47 100644
--- a/verilog/dv/caravel/defs.h
+++ b/verilog/dv/caravel/defs.h
@@ -13,12 +13,9 @@
 extern uint32_t flashio_worker_end;
 
 // Storage area (MGMT: 0x0100_0000, User: 0x0200_0000)
-#define reg_mgmt_block0  (*(volatile uint32_t*)0x01000000)
-#define reg_mgmt_block1  (*(volatile uint32_t*)0x01100000)
-#define reg_user_block0  (*(volatile uint32_t*)0x02000000)
-#define reg_user_block1  (*(volatile uint32_t*)0x02100000)
-#define reg_user_block2  (*(volatile uint32_t*)0x02200000)
-#define reg_user_block3  (*(volatile uint32_t*)0x02300000)
+#define reg_rw_block0  (*(volatile uint32_t*)0x01000000)
+#define reg_rw_block1  (*(volatile uint32_t*)0x01100000)
+#define reg_ro_block0  (*(volatile uint32_t*)0x02000000)
 
 // UART (0x2000_0000)
 #define reg_uart_clkdiv (*(volatile uint32_t*)0x20000000)

verilog/dv/caravel/mgmt_soc/storage/storage.c

diff --git a/verilog/dv/caravel/mgmt_soc/storage/storage.c b/verilog/dv/caravel/mgmt_soc/storage/storage.c
index 62a9428..b5f7408 100644
--- a/verilog/dv/caravel/mgmt_soc/storage/storage.c
+++ b/verilog/dv/caravel/mgmt_soc/storage/storage.c
@@ -40,12 +40,12 @@
 
     // Test Management R/W block0
     for (i=0; i<10; i++){
-        ram_addr = &reg_mgmt_block0 + i;
+        ram_addr = &reg_rw_block0 + i;
         *ram_addr = i*5000 + 10000;
     }
 	
     for (i=0; i<10; i++){
-        ram_addr = &reg_mgmt_block0 + i;
+        ram_addr = &reg_rw_block0 + i;
         if ((i*5000+10000) != *ram_addr) 
 	    reg_mprj_datal = 0xAB400000;
     }
@@ -55,12 +55,12 @@
     // Test Management R/W block1
     reg_mprj_datal = 0xA0200000;
     for (i=0; i<10; i++){
-        ram_addr = &reg_mgmt_block1 + i;
+        ram_addr = &reg_rw_block1 + i;
         *ram_addr = i*5000 + 10000;
     }
 	
     for (i=0; i<10; i++){
-        ram_addr = &reg_mgmt_block1 + i;
+        ram_addr = &reg_rw_block1 + i;
         if ((i*5000+10000) != *ram_addr) 
 	    reg_mprj_datal = 0xAB200000;
     }