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# TinyTapeout project information
project:
wokwi_id: 350175937959035475 # If using wokwi, set this to your project's ID
# source_files: # If using an HDL, set wokwi_id as 0 and uncomment and list your source files here
# - verilog/rtl/counter.v
# - verilog/rtl/decoder.v
# top_module: "seven_segment_seconds" # put the name of your top module here, make it unique by prepending your github username
# As everyone will have access to all designs, try to make it easy for someone new to your design to know what
# it does and how to operate it.
#
# Here is an example: https://github.com/mattvenn/tinytapeout_m_segments/blob/main/info.yaml
#
# This info will be automatically collected and used to make a datasheet for the chip.
documentation:
author: "" # Your name
discord: "" # Your discord handle - make sure to include the # part as well
title: "" # Project title
description: "" # Short description of what your project does
how_it_works: "" # Longer description of how the project works
how_to_test: "" # Instructions on how someone could test your project, include things like what buttons do what and how to set the clock if needed
external_hw: "" # Describe any external hardware needed
language: "wokwi" # other examples include Verilog, Amaranth, VHDL, etc
doc_link: "" # URL to longer form documentation, eg the README.md in your repository
clock_hz: 0 # Clock frequency in Hz (if required) we are expecting max clock frequency to be ~6khz. Provided on input 0.
picture: "" # relative path to a picture in your repository
inputs: # a description of what the inputs do
- in0
- in1
- in2
- in3
- in4
- in5
- in6
- in7
- in8
- in9
- in10
- in11
- in12
- in13
- in14
- in15
outputs:
- out0
- out1
- out2
- out3
- out4
- out5
- out6
- out7
- out8
- out9
- out10
- out11