PPCPU DV

Testbenches description

boot_cw

Boots cpu and emulates external CW bus.

Submits a few instructios such as jumps and memory accesses and verifes bus responses

boot_cw_split

Same as boot_cw but bus runs on divided clock with CDC.

boot_embed

Starts CPU as disabled and in embed mode.

Writes test.s program on internal ram via SPI interface.

Test program sets up paging for device access and then reads and writes to GPIO pins.

Testbench monitors GPIO activity

_reduced versions

_reduced versions are testbenches without caravel and mgmt socs (they are simply emulated).

It is used to save simulation time, as GPIO setup by mgmt core takes ~30k cycles and 30 min of GL tests can be saved.

Quick Launch for Designers

Dependencies

• Docker: Linux || Windows || Mac with Intel Chip || Mac with Apple Chip

Running the simulation

Assuming you already:

• went throught the quick start for setting up your environemnt,
• integrated your design into the user's wrapper and
• hardenned your design as well as the user's wrapper (for GL simulation)

make simenv
SIM=RTL make verify-<dv-test>
# OR
SIM=GL make verify-<dv-test>

<dv-test>: io_ports, mprj_stimulus, la_test1, la_test2 or wb_port.

For advanced users

Simulation Environment Setup

There are two options for setting up the simulation environment:

• Pulling a pre-built docker image
• Installing the dependecies locally. Instructions to setting up the environment locally can be found here

Docker

There is an available docker setup with the needed tools at efabless/dockerized-verification-setup

Run the following to pull the image:

docker pull efabless/dv_setup:latest

Running Simulation

First, you will need to export a number of environment variables:

export PDK_PATH=<pdk-location/sky130A>
export CARAVEL_ROOT=<caravel_root>
export TARGET_PATH=<caravel_user_project>

Then, run the following command to start the docker container :

docker run -it -v ${TARGET_PATH}:${TARGET_PATH} -v ${PDK_ROOT}:${PDK_ROOT} \
		-v ${CARAVEL_ROOT}:${CARAVEL_ROOT} \
		-e TARGET_PATH=${TARGET_PATH} -e PDK_ROOT=${PDK_ROOT} \
		-e CARAVEL_ROOT=${CARAVEL_ROOT} \
		-e TOOLS=/foss/tools/riscv-gnu-toolchain-rv32i/411d134 \
		-e DESIGNS=$(TARGET_PATH) \
		-e CORE_VERILOG_PATH=$(TARGET_PATH)/mgmt_core_wrapper/verilog \
		-e MCW_ROOT=$(MCW_ROOT) \
		efabless/dv_setup:latest

Then, navigate to the directory where the DV tests reside :

cd $TARGET_PATH/verilog/dv/

To run any simulation, you need to be on the top level or caravel_user_project.

To run RTL simulation for one of the DV tests,

SIM=RTL make verify-<dv-test>

To run gate level simulation for one of the DV tests,

SIM=GL make verify-<dv-test>