| - status: 0 - openlane design prep |
| runtime_s: 1.87 |
| runtime_ts: 0h0m1s871ms |
| - status: 1 - synthesis - yosys |
| runtime_s: 14.46 |
| runtime_ts: 0h0m14s457ms |
| - status: 2 - sta - openroad |
| runtime_s: 0.88 |
| runtime_ts: 0h0m0s878ms |
| - status: 3 - floorplan initialization - openroad |
| runtime_s: 1.15 |
| runtime_ts: 0h0m1s151ms |
| - status: 4 - io_place - openlane |
| runtime_s: 0.35 |
| runtime_ts: 0h0m0s346ms |
| - status: 5 - tap/decap insertion - openroad |
| runtime_s: 0.56 |
| runtime_ts: 0h0m0s559ms |
| - status: 6 - pdn generation - openroad |
| runtime_s: 0.69 |
| runtime_ts: 0h0m0s685ms |
| - status: 7 - global placement - openroad |
| runtime_s: 14.79 |
| runtime_ts: 0h0m14s787ms |
| - status: 8 - resizer design optimizations - openroad |
| runtime_s: 3.15 |
| runtime_ts: 0h0m3s149ms |
| - status: 9 - detailed placement - openroad |
| runtime_s: 0.72 |
| runtime_ts: 0h0m0s721ms |
| - status: 10 - cts - openroad |
| runtime_s: 32.83 |
| runtime_ts: 0h0m32s826ms |
| - status: 11 - resizer timing optimizations - openroad |
| runtime_s: 2.73 |
| runtime_ts: 0h0m2s734ms |
| - status: 12 - resizer timing optimizations - openroad |
| runtime_s: 13.66 |
| runtime_ts: 0h0m13s657ms |
| - status: 14 - detailed placement - openroad |
| runtime_s: 0.78 |
| runtime_ts: 0h0m0s775ms |
| - status: 14 - diode insertion - openlane |
| runtime_s: 0.86 |
| runtime_ts: 0h0m0s864ms |
| - status: 15 - fill insertion - openroad |
| runtime_s: 0.92 |
| runtime_ts: 0h0m0s919ms |
| - status: 17 - write verilog - openroad |
| runtime_s: 0.64 |
| runtime_ts: 0h0m0s638ms |
| - status: 17 - global routing - openroad |
| runtime_s: 0.72 |
| runtime_ts: 0h0m0s724ms |
| - status: 18 - detailed_routing - openroad |
| runtime_s: 199.9 |
| runtime_ts: 0h3m19s902ms |
| - status: 19 - wire lengths - openlane |
| runtime_s: 0.64 |
| runtime_ts: 0h0m0s635ms |
| - status: 20 - parasitics extraction - openroad |
| runtime_s: 2.59 |
| runtime_ts: 0h0m2s589ms |
| - status: 21 - sta - openroad |
| runtime_s: 22.4 |
| runtime_ts: 0h0m22s399ms |
| - status: 22 - parasitics extraction - openroad |
| runtime_s: 2.59 |
| runtime_ts: 0h0m2s589ms |
| - status: 23 - sta - openroad |
| runtime_s: 23.47 |
| runtime_ts: 0h0m23s469ms |
| - status: 24 - parasitics extraction - openroad |
| runtime_s: 2.67 |
| runtime_ts: 0h0m2s671ms |
| - status: 25 - sta - openroad |
| runtime_s: 22.96 |
| runtime_ts: 0h0m22s957ms |
| - status: 26 - sta - openroad |
| runtime_s: 5.72 |
| runtime_ts: 0h0m5s722ms |
| - status: 27 - ir drop report - openroad |
| runtime_s: 1.4 |
| runtime_ts: 0h0m1s403ms |
| - status: 28 - gdsii - magic |
| runtime_s: 13.3 |
| runtime_ts: 0h0m13s301ms |
| - status: 29 - gdsii - klayout |
| runtime_s: 1.39 |
| runtime_ts: 0h0m1s389ms |
| - status: 30 - xor - klayout |
| runtime_s: 34.67 |
| runtime_ts: 0h0m34s665ms |
| - status: 31 - spice extraction - magic |
| runtime_s: 18.08 |
| runtime_ts: 0h0m18s83ms |
| - status: 33 - write verilog - openroad |
| runtime_s: 0.73 |
| runtime_ts: 0h0m0s733ms |
| - status: 33 - write powered verilog - openlane |
| runtime_s: 0.86 |
| runtime_ts: 0h0m0s861ms |
| - status: 34 - lvs - netgen |
| runtime_s: 2.88 |
| runtime_ts: 0h0m2s882ms |
| - status: 35 - drc - magic |
| runtime_s: 60.21 |
| runtime_ts: 0h1m0s207ms |
| - status: 36 - antenna check - openroad |
| runtime_s: 0.96 |
| runtime_ts: 0h0m0s965ms |
| - status: 37 - erc - circuit validity checker |
| runtime_s: 0.48 |
| runtime_ts: 0h0m0s480ms |
| --- |
| - status: routed |
| runtime_s: 296.0 |
| runtime_ts: 0h4m56s0ms |
| - status: flow completed |
| runtime_s: 517.0 |
| runtime_ts: 0h8m37s0ms |
