| - status: 0 - openlane design prep |
| runtime_s: 1.77 |
| runtime_ts: 0h0m1s765ms |
| - status: 1 - synthesis - yosys |
| runtime_s: 14.3 |
| runtime_ts: 0h0m14s301ms |
| - status: 2 - sta - openroad |
| runtime_s: 0.9 |
| runtime_ts: 0h0m0s898ms |
| - status: 3 - floorplan initialization - openroad |
| runtime_s: 1.09 |
| runtime_ts: 0h0m1s94ms |
| - status: 4 - io_place - openlane |
| runtime_s: 0.4 |
| runtime_ts: 0h0m0s398ms |
| - status: 5 - tap/decap insertion - openroad |
| runtime_s: 0.53 |
| runtime_ts: 0h0m0s532ms |
| - status: 6 - pdn generation - openroad |
| runtime_s: 0.69 |
| runtime_ts: 0h0m0s693ms |
| - status: 7 - global placement - openroad |
| runtime_s: 13.89 |
| runtime_ts: 0h0m13s885ms |
| - status: 8 - resizer design optimizations - openroad |
| runtime_s: 3.09 |
| runtime_ts: 0h0m3s87ms |
| - status: 9 - detailed placement - openroad |
| runtime_s: 0.67 |
| runtime_ts: 0h0m0s667ms |
| - status: 10 - cts - openroad |
| runtime_s: 32.82 |
| runtime_ts: 0h0m32s823ms |
| - status: 11 - resizer timing optimizations - openroad |
| runtime_s: 2.42 |
| runtime_ts: 0h0m2s419ms |
| - status: 12 - resizer timing optimizations - openroad |
| runtime_s: 6.77 |
| runtime_ts: 0h0m6s766ms |
| - status: 14 - detailed placement - openroad |
| runtime_s: 0.8 |
| runtime_ts: 0h0m0s799ms |
| - status: 14 - diode insertion - openlane |
| runtime_s: 0.91 |
| runtime_ts: 0h0m0s910ms |
| - status: 15 - fill insertion - openroad |
| runtime_s: 0.94 |
| runtime_ts: 0h0m0s942ms |
| - status: 17 - write verilog - openroad |
| runtime_s: 0.69 |
| runtime_ts: 0h0m0s691ms |
| - status: 17 - global routing - openroad |
| runtime_s: 0.81 |
| runtime_ts: 0h0m0s807ms |
| - status: 18 - detailed_routing - openroad |
| runtime_s: 330.94 |
| runtime_ts: 0h5m30s942ms |
| - status: 19 - wire lengths - openlane |
| runtime_s: 0.84 |
| runtime_ts: 0h0m0s839ms |
| - status: 20 - parasitics extraction - openroad |
| runtime_s: 3.7 |
| runtime_ts: 0h0m3s702ms |
| - status: 21 - sta - openroad |
| runtime_s: 32.09 |
| runtime_ts: 0h0m32s93ms |
| - status: 22 - parasitics extraction - openroad |
| runtime_s: 3.69 |
| runtime_ts: 0h0m3s690ms |
| - status: 23 - sta - openroad |
| runtime_s: 33.12 |
| runtime_ts: 0h0m33s124ms |
| - status: 24 - parasitics extraction - openroad |
| runtime_s: 3.66 |
| runtime_ts: 0h0m3s660ms |
| - status: 25 - sta - openroad |
| runtime_s: 32.27 |
| runtime_ts: 0h0m32s274ms |
| - status: 26 - sta - openroad |
| runtime_s: 7.96 |
| runtime_ts: 0h0m7s955ms |
| - status: 27 - ir drop report - openroad |
| runtime_s: 1.73 |
| runtime_ts: 0h0m1s726ms |
| - status: 28 - gdsii - magic |
| runtime_s: 17.68 |
| runtime_ts: 0h0m17s681ms |
| - status: 29 - gdsii - klayout |
| runtime_s: 1.92 |
| runtime_ts: 0h0m1s922ms |
| - status: 30 - xor - klayout |
| runtime_s: 46.44 |
| runtime_ts: 0h0m46s439ms |
| - status: 31 - spice extraction - magic |
| runtime_s: 25.06 |
| runtime_ts: 0h0m25s60ms |
| - status: 33 - write verilog - openroad |
| runtime_s: 0.9 |
| runtime_ts: 0h0m0s904ms |
| - status: 33 - write powered verilog - openlane |
| runtime_s: 1.04 |
| runtime_ts: 0h0m1s40ms |
| - status: 34 - lvs - netgen |
| runtime_s: 4.0 |
| runtime_ts: 0h0m4s4ms |
| - status: 35 - drc - magic |
| runtime_s: 77.92 |
| runtime_ts: 0h1m17s924ms |
| - status: 36 - antenna check - openroad |
| runtime_s: 1.32 |
| runtime_ts: 0h0m1s320ms |
| - status: 37 - erc - circuit validity checker |
| runtime_s: 0.58 |
| runtime_ts: 0h0m0s585ms |
| --- |
| - status: routed |
| runtime_s: 419.0 |
| runtime_ts: 0h6m59s0ms |
| - status: flow failed |
| runtime_s: 719.0 |
| runtime_ts: 0h11m59s0ms |
