| /root/leosoc/lib/leorv32.lib |
| /root/leosoc/lib/user_project_wrapper.lib |
| /root/leosoc/openlane/leorv32/config.json |
| /root/leosoc/openlane/soc/config.json |
| /root/leosoc/openlane/user_project_wrapper/config.json |
| /root/leosoc/sdc/leorv32.sdc |
| /root/leosoc/sdc/user_project_wrapper.sdc |
| /root/leosoc/sdf/leorv32.sdf |
| /root/leosoc/sdf/user_project_wrapper.sdf |
| /root/leosoc/sdf/multicorner/max/user_project_wrapper.ff.sdf |
| /root/leosoc/sdf/multicorner/max/user_project_wrapper.ss.sdf |
| /root/leosoc/sdf/multicorner/max/user_project_wrapper.tt.sdf |
| /root/leosoc/sdf/multicorner/min/user_project_wrapper.ff.sdf |
| /root/leosoc/sdf/multicorner/min/user_project_wrapper.ss.sdf |
| /root/leosoc/sdf/multicorner/min/user_project_wrapper.tt.sdf |
| /root/leosoc/sdf/multicorner/nom/user_project_wrapper.ff.sdf |
| /root/leosoc/sdf/multicorner/nom/user_project_wrapper.ss.sdf |
| /root/leosoc/sdf/multicorner/nom/user_project_wrapper.tt.sdf |
| /root/leosoc/spef/leorv32.spef |
| /root/leosoc/spef/user_project_wrapper.spef |
| /root/leosoc/spef/multicorner/user_project_wrapper.max.spef |
| /root/leosoc/spef/multicorner/user_project_wrapper.min.spef |
| /root/leosoc/spef/multicorner/user_project_wrapper.nom.spef |
| /root/leosoc/verilog/includes/includes.gl+sdf.caravel_user_project |
| /root/leosoc/verilog/includes/includes.gl.caravel_user_project |
| /root/leosoc/verilog/includes/includes.rtl.caravel_user_project |
| /root/leosoc/verilog/rtl/leorv-fpga/Makefile |
| /root/leosoc/verilog/rtl/leorv-fpga/constraints/icebreaker.pcf |
| /root/leosoc/verilog/rtl/leorv-fpga/constraints/ulx3s_v20.lpf |
| /root/leosoc/verilog/rtl/leorv-fpga/firmware/firmware.map |
| /root/leosoc/verilog/rtl/leorv-fpga/firmware/icebreaker_sections.lds |
| /root/leosoc/verilog/rtl/leorv-fpga/firmware/main.c |
| /root/leosoc/verilog/rtl/leorv-fpga/firmware/makehex.py |
| /root/leosoc/verilog/rtl/leorv-fpga/firmware/sections.lds |
| /root/leosoc/verilog/rtl/leorv-fpga/firmware/start.S |
| /root/leosoc/verilog/rtl/leorv-fpga/firmware/ulx3s_sections.lds |
| /root/leosoc/verilog/rtl/leorv-fpga/firmware/verilogmem.py |
| /root/leosoc/verilog/rtl/leorv-fpga/images/image_converter.py |
| /root/leosoc/verilog/rtl/leorv-fpga/leorv32/rtl/leorv32.sv |
| /root/leosoc/verilog/rtl/leorv-fpga/leorv32/rtl/leorv32_pkg.sv |
| /root/leosoc/verilog/rtl/leorv-fpga/mem_port_switch/rtl/mem_port_switch.sv |
| /root/leosoc/verilog/rtl/leorv-fpga/soc/rtl/dual_soc.sv |
| /root/leosoc/verilog/rtl/leorv-fpga/soc/rtl/dual_soc_svga.sv |
| /root/leosoc/verilog/rtl/leorv-fpga/soc/rtl/icebreaker_top.sv |
| /root/leosoc/verilog/rtl/leorv-fpga/soc/rtl/simple_soc.sv |
| /root/leosoc/verilog/rtl/leorv-fpga/soc/rtl/simple_soc_svga.sv |
| /root/leosoc/verilog/rtl/leorv-fpga/soc/rtl/ulx3s_top.sv |
| /root/leosoc/verilog/rtl/leorv-fpga/soc/tb/icebreaker_top_tb.sv |
| /root/leosoc/verilog/rtl/leorv-fpga/soc/tb/ulx3s_top_tb.sv |
| /root/leosoc/verilog/rtl/leorv-fpga/sram/rtl/sram.sv |
| /root/leosoc/verilog/rtl/leorv-fpga/svga/rtl/svga_gen.sv |
| /root/leosoc/verilog/rtl/leorv-fpga/svga/rtl/svga_gen_top.sv |
| /root/leosoc/verilog/rtl/leorv-fpga/svga/tb/svga_gen_top_tb.sv |
| /root/leosoc/verilog/rtl/leorv-fpga/uart/rtl/my_uart_rx.sv |
| /root/leosoc/verilog/rtl/leorv-fpga/uart/rtl/my_uart_tx.sv |
| /root/leosoc/verilog/rtl/leorv-fpga/uart/tb/my_uart_rx_tb.sv |
| /root/leosoc/verilog/rtl/leorv-fpga/uart/tb/my_uart_tx_tb.sv |
| /root/leosoc/verilog/rtl/leorv-fpga/util/rtl/T_ff.sv |
| /root/leosoc/verilog/rtl/leorv-fpga/util/rtl/debouncer.sv |
| /root/leosoc/verilog/rtl/leorv-fpga/util/rtl/edge_detection.sv |
| /root/leosoc/verilog/rtl/leorv-fpga/util/rtl/synchronizer.sv |
| /root/leosoc/verilog/rtl/leorv-fpga/util/tb/T_ff_tb.sv |
| /root/leosoc/verilog/rtl/leorv-fpga/util/tb/debouncer_tb.sv |
| /root/leosoc/verilog/rtl/leorv-fpga/util/tb/edge_detection_tb.sv |
| /root/leosoc/verilog/rtl/leorv-fpga/util/tb/synchronizer_tb.sv |
| /root/leosoc/verilog/rtl/leorv-fpga/wb_memory/rtl/wb_memory.sv |
