| commit | 9949afdbd61cb98f4831e79cd47f091e5dc6a7f7 | [log] [tgz] |
|---|---|---|
| author | Jeff DiCorpo <jeffdi@efabless.com> | Sat Dec 17 13:30:49 2022 -0800 |
| committer | Jeff DiCorpo <jeffdi@efabless.com> | Sat Dec 17 13:30:49 2022 -0800 |
| tree | 3813c511fa357339e9db05916e79c4352da38c1e | |
| parent | bb1a4f6697b425f6aa56cbe020ad1a0fd860dc95 [diff] |
final gds oasis
This repository is a branch of the caravel_user_project repository, modified for the tapeout of a 512-LUT4 FPGA generated using PRGA.
The project is a test project, forked from the MPW5 PRGA project.
A 512-LUT4 FPGA generated using PRGA (Princeton Reconfigurable Gate Array)
We used a three level hierarchical design:
