| commit | 91c8baca611de812f1a5e7981f8a6238eecd5b11 | [log] [tgz] |
|---|---|---|
| author | Po-Chun Huang <hpcalex@terpmail.umd.edu> | Mon Nov 21 11:41:13 2022 -0500 |
| committer | Po-Chun Huang <hpcalex@terpmail.umd.edu> | Mon Nov 21 11:41:13 2022 -0500 |
| tree | 2988fdf1cbb5e527296b3f5e2ea01cf4ba3e92f5 | |
| parent | b2010103bcafffddcf840761936436a5e10336e4 [diff] |
added user_defines.v
This project contains array of various sizes of 1T1R devices and a 1T1R 256x256 ReRAM module for device performance characterization, e.g. I-V, transient, R-ratio, and variations, and ReRAM simulation model verification. The goal is to design a low power ReRAM controller optimized for write/read latency, endurance, and power consumption based on the actual measurement results of sky130 ReRAM devices.
Refer to README for this sample project documentation. ~