Update user_defines.v

verilog/rtl/user_defines.v

diff --git a/verilog/rtl/user_defines.v b/verilog/rtl/user_defines.v
index 93feb57..80f0134 100644
--- a/verilog/rtl/user_defines.v
+++ b/verilog/rtl/user_defines.v
@@ -52,7 +52,7 @@
 // up in a state that can be used immediately without depending on
 // the management SoC to run a startup program to configure the GPIOs.
 
-`define USER_CONFIG_GPIO_5_INIT  `GPIO_MODE_INVALID
+`define USER_CONFIG_GPIO_5_INIT  `GPIO_MODE_USER_STD_INPUT_NOPULL
 `define USER_CONFIG_GPIO_6_INIT  `GPIO_MODE_USER_STD_OUTPUT
 `define USER_CONFIG_GPIO_7_INIT  `GPIO_MODE_USER_STD_OUTPUT
 `define USER_CONFIG_GPIO_8_INIT  `GPIO_MODE_USER_STD_OUTPUT
@@ -89,4 +89,4 @@
 `define USER_CONFIG_GPIO_36_INIT `GPIO_MODE_USER_STD_OUTPUT
 `define USER_CONFIG_GPIO_37_INIT `GPIO_MODE_USER_STD_OUTPUT
 
-`endif // __USER_DEFINES_H
\ No newline at end of file
+`endif // __USER_DEFINES_H