Working testbench but failed hardening
diff --git a/openlane/sha1_top/config.tcl b/openlane/sha1_top/config.tcl index 81972bb..f398534 100755 --- a/openlane/sha1_top/config.tcl +++ b/openlane/sha1_top/config.tcl
@@ -35,15 +35,15 @@ # always got: "There are hold violations in the design at the typical corner" when FP_SIZING was absolute... # no matter what PL or GLB parameters I set. tried increasing both HOLD_MAX_BUFFER_PERCENT and HOLD_SLACK_MARGIN to 80% and 0.3ns -set ::env(FP_SIZING) absolute +set ::env(FP_SIZING) relative # max area in wrapper: 0 0 2920 3520 -set ::env(DIE_AREA) "0 0 2920 3520" +# set ::env(DIE_AREA) "0 0 6000 8000" set ::env(FP_PIN_ORDER_CFG) $script_dir/pin_order.cfg set ::env(PL_BASIC_PLACEMENT) 0 # set ::env(PL_TARGET_DENSITY) 0.6 -set ::env(FP_CORE_UTIL) 94 +set ::env(FP_CORE_UTIL) 30 # with 10%: detailed placement faild and had setup violations # with 50%: detailed placement faild and had setup violations # with 100% and 0.7: "Utilization exceeds 100%." Ran out of space? @@ -260,7 +260,7 @@ # Error: resizer_routing_timing.tcl, 53 GRT-0118 -# DIE_AREA: "0 0 2900 3500" (absolute and commented out eerything except PL_RANDOM_GLB_PLACEMENT == 0 and all buffer % = 80) +# DIE_AREA: "0 0 2900 3500" (absolute and commented out everything except PL_RANDOM_GLB_PLACEMENT == 0 and all buffer % = 80) # with 90% and default PL_TARGET_DENSITY: # [STEP 21] # [INFO]: Running Global Routing... @@ -279,7 +279,7 @@ # Error: groute.tcl, 55 GRT-0118 -# DIE_AREA: "0 0 2920 3520" (absolute and commented out eerything except PL_RANDOM_GLB_PLACEMENT == 0 and all buffer % = 80) +# DIE_AREA: "0 0 2920 3520" (absolute and commented out everything except PL_RANDOM_GLB_PLACEMENT == 0 and all buffer % = 80) # with 94% and default PL_TARGET_DENSITY: # [STEP 21] # [INFO]: Running Global Routing... @@ -298,6 +298,44 @@ # Error: groute.tcl, 55 GRT-0118 +# DIE_AREA: "0 0 6000 8000" (absolute and commented out everything except PL_RANDOM_GLB_PLACEMENT == 0 and all buffer % = 80) +# with 90% and default PL_TARGET_DENSITY: +# [STEP 15] +# [INFO]: Running Global Routing Resizer Timing Optimizations... +# [ERROR]: during executing openroad script /openlane/scripts/openroad/resizer_routing_timing.tcl +# [ERROR]: Exit code: 1 +# [ERROR]: full log: ../Users/somasz/Documents/GitHub/mpw_6c/caravel_design/caravel_bitcoin_asic/openlane/sha1_top/runs/22_08_29_11_16/logs/routing/15-resizer.log +# [ERROR]: Last 10 lines: + +# [INFO GRT-0101] Running extra iterations to remove overflow. +# [INFO GRT-0197] Via related to pin nodes: 66525 +# [INFO GRT-0198] Via related Steiner nodes: 1333 +# [INFO GRT-0199] Via filling finished. +# [INFO GRT-0111] Final number of vias: 86746 +# [INFO GRT-0112] Final usage 3D: 466964 +# [ERROR GRT-0118] Routing congestion too high. +# Error: resizer_routing_timing.tcl, 53 GRT-0118 + + +# Commented out: DIE_AREA: "0 0 6000 8000" (FP_SIZING = relative and commented out everything except PL_RANDOM_GLB_PLACEMENT == 0 and all buffer % = 80) +# with 30% and default PL_TARGET_DENSITY: +# [STEP 18] +# [INFO]: Running Detailed Placement... +# [ERROR]: during executing openroad script /openlane/scripts/openroad/opendp.tcl +# [ERROR]: Exit code: 1 +# [ERROR]: full log: ../Users/somasz/Documents/GitHub/mpw_6c/caravel_design/caravel_bitcoin_asic/openlane/sha1_top/runs/22_08_29_13_53/logs/routing/18-diode_legalization.log +# [ERROR]: Last 10 lines: +# [INFO DPL-0035] ANTENNA__14155__A1 +# [INFO DPL-0035] ANTENNA__14155__A1 +# [INFO DPL-0035] ANTENNA__20474__A2 +# [INFO DPL-0035] ANTENNA__20930__A +# [INFO DPL-0035] ANTENNA__20930__A +# [INFO DPL-0035] ANTENNA__16103__A0 +# [INFO DPL-0035] message limit reached, this message will no longer print +# [ERROR DPL-0036] Detailed placement failed. +# Error: opendp.tcl, 32 DPL-0036 + + # TODO
diff --git a/verilog/dv/resources/main.c b/verilog/dv/resources/main.c new file mode 100644 index 0000000..77249df --- /dev/null +++ b/verilog/dv/resources/main.c
@@ -0,0 +1,33 @@ +// Program to convert a string to ASCII in hex for input to the HW SHA modules +#include<stdio.h> +#include<stdlib.h> +#include<string.h> + +#define USE_INPUT 0 +#define INPUT_LIMIT 100 + +// Link for hashing digests: https://www.fileformat.info/tool/hash.htm?hex=68656c6c6f20776f726c64 + +int main() { + char* str_to_convert; + + if (USE_INPUT) { + char str[INPUT_LIMIT]; + printf("Enter string to convert:\n"); + fgets(str, INPUT_LIMIT, stdin); + } else { + // str_to_convert = "abc"; + // str_to_convert = "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq"; + str_to_convert = "hello world"; + } + + int i; + printf("Hex value of '%s' is:\n", str_to_convert); + + for (i = 0; i < strlen(str_to_convert) + 1; i++) { + printf("%02x", str_to_convert[i] & 0xFF); + } + printf("\nNum chars = %d", i); + + return 0; +}
diff --git a/verilog/dv/sha1_top_test2/sha1_top_test2.c b/verilog/dv/sha1_top_test2/sha1_top_test2.c index 16edea8..40a3023 100644 --- a/verilog/dv/sha1_top_test2/sha1_top_test2.c +++ b/verilog/dv/sha1_top_test2/sha1_top_test2.c
@@ -143,143 +143,163 @@ reg_mprj_datal = 0xFEEDFEED; // reg_mprj_datah = 0x00000000; - // set control information to SHA256: sha_init, auto_ctrl, and start_ctrl + + // * data I/O from MSB to LSB + // * TC1 (from SHA1 repo) + // TC1: Single block message: "abc". + // tc1 = 512'h61626380000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018; + // res1 = 160'h a9993e36 4706816a ba3e2571 7850c26c 9cd0d89d; + + // set control information to SHA256: sha_next: 0, sha_init: 1, auto_ctrl: 1, and start_ctrl: 1 // *init bit starts sha_core, but only write to control register after reading in 512-bit input! reg_la3_data = 0x00010C00; - - // TODO could put in loop? - // aa55aa55 - // deadbeef - // 55aa55aa - // f00ff00f - reg_mprj_slave = 0xaa55aa55; - // reg_mprj_slave = sha256_input[index]; - // index++; - // sha_addr == ADDR_BLOCK0 && sha_we && sha_cs && sha_read_data == 0 - // * removed because can not read register value - // reg_val = reg_la2_data; - // while ((reg_val & 0x00000FFF) != 0x310) - // { - // num_trials++; - // if (num_trials > NUM_TRIALS_LIMIT) { - // // did not read input - // testsPassed = testsPassed & 0; - // reg_mprj_datal = 0xBAD0BAD0; - // break; - // } - // reg_val = reg_la2_data; - // } - // num_trials = 0; // reset number of trials - - // set control information to SHA256: disable start_ctrl + reg_mprj_slave = 0x61626380; reg_la3_data = 0x00010800; + reg_mprj_slave = 0x00000000; + reg_mprj_slave = 0x00000000; + reg_mprj_slave = 0x00000000; - reg_mprj_slave = 0xdeadbeef; - // reg_mprj_slave = sha256_input[index]; - // index++; - // sha_addr == ADDR_BLOCK1 && sha_we && sha_cs && sha_read_data == 0 - // * removed because can not read register value - // reg_val = reg_la2_data; - // while ((reg_val & 0x00000FFF) != 0x311) - // { - // num_trials++; - // if (num_trials > NUM_TRIALS_LIMIT) { - // // did not read input - // testsPassed = testsPassed & 0; - // reg_mprj_datal = 0xBAD0BAD0; - // break; - // } - // reg_val = reg_la2_data; - // } - // num_trials = 0; // reset number of trials + reg_mprj_slave = 0x00000000; + reg_mprj_slave = 0x00000000; + reg_mprj_slave = 0x00000000; + reg_mprj_slave = 0x00000000; - reg_mprj_slave = 0x55aa55aa; - reg_mprj_slave = 0xf00ff00f; + reg_mprj_slave = 0x00000000; + reg_mprj_slave = 0x00000000; + reg_mprj_slave = 0x00000000; + reg_mprj_slave = 0x00000000; - reg_mprj_slave = 0xaa55aa55; - reg_mprj_slave = 0xdeadbeef; - reg_mprj_slave = 0x55aa55aa; - reg_mprj_slave = 0xf00ff00f; - - reg_mprj_slave = 0xaa55aa55; - reg_mprj_slave = 0xdeadbeef; - reg_mprj_slave = 0x55aa55aa; - reg_mprj_slave = 0xf00ff00f; - - reg_mprj_slave = 0xaa55aa55; - reg_mprj_slave = 0xdeadbeef; - reg_mprj_slave = 0x55aa55aa; - reg_mprj_slave = 0xf00ff00f; + reg_mprj_slave = 0x00000000; + reg_mprj_slave = 0x00000000; + reg_mprj_slave = 0x00000000; + reg_mprj_slave = 0x00000018; // read valid output hash (digest) - hash_out0 = reg_mprj_slave; - // reg_val = reg_la2_data; - // if ((reg_val & 0x00000FFF) == 0x120) - // { - // testsPassed = testsPassed & 1; - // } - // else - // { - // testsPassed = testsPassed & 0; - // reg_mprj_datal = 0xBAD0BAD0; - // } - - hash_out1 = reg_mprj_slave; - // reg_val = reg_la2_data; - // if ((reg_val & 0x00000FFF) == 0x121) - // { - // testsPassed = testsPassed & 1; - // } - // else - // { - // testsPassed = testsPassed & 0; - // reg_mprj_datal = 0xBAD0BAD0; - // } - - hash_out2 = reg_mprj_slave; - // reg_val = reg_la2_data; - // if ((reg_val & 0x00000FFF) == 0x122) - // { - // testsPassed = testsPassed & 1; - // } - // else - // { - // testsPassed = testsPassed & 0; - // reg_mprj_datal = 0xBAD0BAD0; - // } - - hash_out3 = reg_mprj_slave; - // reg_val = reg_la2_data; - // if ((reg_val & 0x00000FFF) == 0x123) - // { - // testsPassed = testsPassed & 1; - // } - // else - // { - // testsPassed = testsPassed & 0; - // reg_mprj_datal = 0xBAD0BAD0; - // } - hash_out4 = reg_mprj_slave; - // reg_val = reg_la2_data; - // if ((reg_val & 0x00000FFF) == 0x124) - // { - // testsPassed = testsPassed & 1; - // } - // else - // { - // testsPassed = testsPassed & 0; - // reg_mprj_datal = 0xBAD0BAD0; - // } + hash_out3 = reg_mprj_slave; + hash_out2 = reg_mprj_slave; + hash_out1 = reg_mprj_slave; + hash_out0 = reg_mprj_slave; - if ((hash_out4 == 0xea2ebc79) && (hash_out3 == 0x35516705) && (hash_out2 == 0xde1e1467) && - (hash_out1 == 0x31e55587) && (hash_out0 == 0xa0038725)) + if (!((hash_out4 == 0xa9993e36) && (hash_out3 == 0x4706816a) && (hash_out2 == 0xba3e2571) && + (hash_out1 == 0x7850c26c) && (hash_out0 == 0x9cd0d89d))) + { + reg_mprj_datal = 0xBAD0BAD0; // failed test + } + + + // * TC2_1 (from SHA1 repo) + // TC2: Double block message. + // "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq" + // tc2_1 = 512'h 61626364 62636465 63646566 64656667 65666768 66676869 6768696A 68696A6B 696A6B6C 6A6B6C6D 6B6C6D6E 6C6D6E6F 6D6E6F70 6E6F7071 80000000 00000000; + // res2_1 = 160'h f4286818 c37b27ae 0408f581 84677148 4a566572; + reg_la3_data = 0x00010C00; + reg_mprj_slave = 0x61626364; + reg_la3_data = 0x00010800; + reg_mprj_slave = 0x62636465; + reg_mprj_slave = 0x63646566; + reg_mprj_slave = 0x64656667; + + reg_mprj_slave = 0x65666768; + reg_mprj_slave = 0x66676869; + reg_mprj_slave = 0x6768696A; + reg_mprj_slave = 0x68696A6B; + + reg_mprj_slave = 0x696A6B6C; + reg_mprj_slave = 0x6A6B6C6D; + reg_mprj_slave = 0x6B6C6D6E; + reg_mprj_slave = 0x6C6D6E6F; + + reg_mprj_slave = 0x6D6E6F70; + reg_mprj_slave = 0x6E6F7071; + reg_mprj_slave = 0x80000000; + reg_mprj_slave = 0x00000000; + + // read valid output hash (digest) + hash_out4 = reg_mprj_slave; + hash_out3 = reg_mprj_slave; + hash_out2 = reg_mprj_slave; + hash_out1 = reg_mprj_slave; + hash_out0 = reg_mprj_slave; + + if (!((hash_out4 == 0xf4286818) && (hash_out3 == 0xc37b27ae) && (hash_out2 == 0x0408f581) && + (hash_out1 == 0x84677148) && (hash_out0 == 0x4a566572))) + { + reg_mprj_datal = 0xBAD0BAD0; // failed test + } + + + // * TC2_2 (from SHA1 repo) + // tc2_2 = 512'h000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001C0; + // res2_2 = 160'h 84983e44 1c3bd26e baae4aa1 f95129e5 e54670f1; + reg_la3_data = 0x00020C00; // * Double block message must set sha_next bit and disable sha_init + reg_mprj_slave = 0x00000000; + reg_la3_data = 0x00020800; // * Double block message must set sha_next bit and disable sha_init + reg_mprj_slave = 0x00000000; + reg_mprj_slave = 0x00000000; + reg_mprj_slave = 0x00000000; + + reg_mprj_slave = 0x00000000; + reg_mprj_slave = 0x00000000; + reg_mprj_slave = 0x00000000; + reg_mprj_slave = 0x00000000; + + reg_mprj_slave = 0x00000000; + reg_mprj_slave = 0x00000000; + reg_mprj_slave = 0x00000000; + reg_mprj_slave = 0x00000000; + + reg_mprj_slave = 0x00000000; + reg_mprj_slave = 0x00000000; + reg_mprj_slave = 0x00000000; + reg_mprj_slave = 0x000001c0; + + // read valid output hash (digest) + hash_out4 = reg_mprj_slave; + hash_out3 = reg_mprj_slave; + hash_out2 = reg_mprj_slave; + hash_out1 = reg_mprj_slave; + hash_out0 = reg_mprj_slave; + + if (!((hash_out4 == 0x84983e44) && (hash_out3 == 0x1c3bd26e) && (hash_out2 == 0xbaae4aa1) && + (hash_out1 == 0xf95129e5) && (hash_out0 == 0xe54670f1))) + { + reg_mprj_datal = 0xBAD0BAD0; // failed test + } + else { // Successfully ended test reg_mprj_datal = 0xDEADDEAD; } - else - { - reg_mprj_datal = 0xBAD0BAD0; - } + + + + + // TODO more tests + // *Custom test + // aa55aa55 + // deadbeef + // 55aa55aa + // f00ff00f + // reg_mprj_slave = 0xaa55aa55; + // reg_la3_data = 0x00010800; + // reg_mprj_slave = 0xdeadbeef; + // reg_mprj_slave = 0x55aa55aa; + // reg_mprj_slave = 0xf00ff00f; + + // reg_mprj_slave = 0xaa55aa55; + // reg_mprj_slave = 0xdeadbeef; + // reg_mprj_slave = 0x55aa55aa; + // reg_mprj_slave = 0xf00ff00f; + + // reg_mprj_slave = 0xaa55aa55; + // reg_mprj_slave = 0xdeadbeef; + // reg_mprj_slave = 0x55aa55aa; + // reg_mprj_slave = 0xf00ff00f; + + // reg_mprj_slave = 0xaa55aa55; + // reg_mprj_slave = 0xdeadbeef; + // reg_mprj_slave = 0x55aa55aa; + // reg_mprj_slave = 0xf00ff00f; + }