blob: 18bc1cd2fe9f21ffabe904757b65a561767b6b5d [file] [log] [blame]
Project Chip ID is: 486436
Setting Project Chip ID to: 00076c24
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!