| /root/zero_to_asic_course_group_submission_mpw7/local.yaml |
| /root/zero_to_asic_course_group_submission_mpw7/projects.yaml |
| /root/zero_to_asic_course_group_submission_mpw7/openlane/user_project_wrapper/extra_lef_gds.tcl |
| /root/zero_to_asic_course_group_submission_mpw7/openlane/user_project_wrapper/macro_power.tcl |
| /root/zero_to_asic_course_group_submission_mpw7/openlane/user_project_wrapper/obstruction.tcl |
| /root/zero_to_asic_course_group_submission_mpw7/verilog/includes/includes.gl+sdf.caravel_user_project |
| /root/zero_to_asic_course_group_submission_mpw7/verilog/includes/includes.gl.caravel_user_project |
| /root/zero_to_asic_course_group_submission_mpw7/verilog/includes/includes.rtl.caravel_user_project |
| /root/zero_to_asic_course_group_submission_mpw7/verilog/rtl/user_project_includes.v |
