| v {xschem version=3.0.0 file_version=1.2 } |
| G {} |
| K {} |
| V {} |
| S {} |
| E {} |
| N 4030 -190 4100 -190 { |
| lab=vccd1} |
| N 4030 -170 4100 -170 { |
| lab=vssa1} |
| N 4030 -150 4100 -150 { |
| lab=io_analog[3]} |
| N 4030 -110 4100 -110 { |
| lab=io_analog[2]} |
| N 4030 -130 4100 -130 { |
| lab=io_analog[8]} |
| N 3530 500 3580 500 { |
| lab=io_clamp_high[2:1]} |
| N 3530 540 3580 540 { |
| lab=io_clamp_high[2:1]} |
| N 4010 -440 4010 -420 { |
| lab=#net1} |
| N 3950 -490 3970 -490 { |
| lab=#net2} |
| N 3950 -440 3950 -390 { |
| lab=#net2} |
| N 3950 -390 3970 -390 { |
| lab=#net2} |
| N 4010 -530 4010 -520 { |
| lab=vccd1} |
| N 4010 -490 4040 -490 { |
| lab=vccd1} |
| N 4040 -530 4040 -490 { |
| lab=vccd1} |
| N 4010 -530 4040 -530 { |
| lab=vccd1} |
| N 4010 -350 4010 -340 { |
| lab=vssa1} |
| N 4010 -390 4040 -390 { |
| lab=vssa1} |
| N 4040 -390 4040 -350 { |
| lab=vssa1} |
| N 4010 -350 4040 -350 { |
| lab=vssa1} |
| N 4170 -440 4170 -420 { |
| lab=#net3} |
| N 4110 -490 4130 -490 { |
| lab=#net1} |
| N 4110 -440 4110 -390 { |
| lab=#net1} |
| N 4110 -390 4130 -390 { |
| lab=#net1} |
| N 4170 -530 4170 -520 { |
| lab=vccd1} |
| N 4170 -490 4200 -490 { |
| lab=vccd1} |
| N 4200 -530 4200 -490 { |
| lab=vccd1} |
| N 4170 -530 4200 -530 { |
| lab=vccd1} |
| N 4170 -350 4170 -340 { |
| lab=vssa1} |
| N 4170 -390 4200 -390 { |
| lab=vssa1} |
| N 4200 -390 4200 -350 { |
| lab=vssa1} |
| N 4170 -350 4200 -350 { |
| lab=vssa1} |
| N 4330 -440 4330 -420 { |
| lab=#net4} |
| N 4270 -490 4290 -490 { |
| lab=#net3} |
| N 4270 -440 4270 -390 { |
| lab=#net3} |
| N 4270 -390 4290 -390 { |
| lab=#net3} |
| N 4330 -530 4330 -520 { |
| lab=vccd1} |
| N 4330 -490 4360 -490 { |
| lab=vccd1} |
| N 4360 -530 4360 -490 { |
| lab=vccd1} |
| N 4330 -530 4360 -530 { |
| lab=vccd1} |
| N 4330 -350 4330 -340 { |
| lab=vssa1} |
| N 4330 -390 4360 -390 { |
| lab=vssa1} |
| N 4360 -390 4360 -350 { |
| lab=vssa1} |
| N 4330 -350 4360 -350 { |
| lab=vssa1} |
| N 4480 -440 4480 -420 { |
| lab=io_analog[0]} |
| N 4420 -490 4440 -490 { |
| lab=#net4} |
| N 4420 -440 4420 -390 { |
| lab=#net4} |
| N 4420 -390 4440 -390 { |
| lab=#net4} |
| N 4480 -530 4480 -520 { |
| lab=vccd1} |
| N 4480 -490 4510 -490 { |
| lab=vccd1} |
| N 4510 -530 4510 -490 { |
| lab=vccd1} |
| N 4480 -530 4510 -530 { |
| lab=vccd1} |
| N 4480 -350 4480 -340 { |
| lab=vssa1} |
| N 4480 -390 4510 -390 { |
| lab=vssa1} |
| N 4510 -390 4510 -350 { |
| lab=vssa1} |
| N 4480 -350 4510 -350 { |
| lab=vssa1} |
| N 4010 -440 4110 -440 { |
| lab=#net1} |
| N 4170 -440 4270 -440 { |
| lab=#net3} |
| N 4330 -440 4420 -440 { |
| lab=#net4} |
| N 4480 -440 4570 -440 { |
| lab=io_analog[0]} |
| N 3920 -440 3950 -440 { |
| lab=#net2} |
| N 4010 -560 4010 -530 { |
| lab=vccd1} |
| N 4330 -560 4480 -560 { |
| lab=vccd1} |
| N 4480 -560 4480 -530 { |
| lab=vccd1} |
| N 4170 -560 4170 -530 { |
| lab=vccd1} |
| N 4330 -560 4330 -530 { |
| lab=vccd1} |
| N 4010 -360 4010 -350 { |
| lab=vssa1} |
| N 4170 -360 4170 -350 { |
| lab=vssa1} |
| N 4330 -360 4330 -350 { |
| lab=vssa1} |
| N 4480 -360 4480 -350 { |
| lab=vssa1} |
| N 4010 -460 4010 -440 { |
| lab=#net1} |
| N 4110 -490 4110 -440 { |
| lab=#net1} |
| N 4170 -460 4170 -440 { |
| lab=#net3} |
| N 4270 -490 4270 -440 { |
| lab=#net3} |
| N 4330 -460 4330 -440 { |
| lab=#net4} |
| N 4420 -490 4420 -440 { |
| lab=#net4} |
| N 4480 -460 4480 -440 { |
| lab=io_analog[0]} |
| N 3950 -490 3950 -440 { |
| lab=#net2} |
| N 4010 -560 4170 -560 { |
| lab=vccd1} |
| N 4170 -560 4330 -560 { |
| lab=vccd1} |
| N 4010 -340 4480 -340 { |
| lab=vssa1} |
| N 3760 -440 3760 -420 { |
| lab=#net2} |
| N 3700 -490 3720 -490 { |
| lab=io_analog[8]} |
| N 3700 -440 3700 -390 { |
| lab=io_analog[8]} |
| N 3700 -390 3720 -390 { |
| lab=io_analog[8]} |
| N 3760 -530 3760 -520 { |
| lab=vccd1} |
| N 3760 -490 3790 -490 { |
| lab=vccd1} |
| N 3790 -530 3790 -490 { |
| lab=vccd1} |
| N 3760 -530 3790 -530 { |
| lab=vccd1} |
| N 3760 -350 3760 -340 { |
| lab=vssa1} |
| N 3760 -390 3790 -390 { |
| lab=vssa1} |
| N 3790 -390 3790 -350 { |
| lab=vssa1} |
| N 3760 -350 3790 -350 { |
| lab=vssa1} |
| N 3670 -440 3700 -440 { |
| lab=io_analog[8]} |
| N 3760 -560 3760 -530 { |
| lab=vccd1} |
| N 3760 -360 3760 -350 { |
| lab=vssa1} |
| N 3760 -460 3760 -440 { |
| lab=#net2} |
| N 3700 -490 3700 -440 { |
| lab=io_analog[8]} |
| N 3760 -440 3920 -440 { |
| lab=#net2} |
| N 3760 -560 4010 -560 { |
| lab=vccd1} |
| N 3760 -340 4010 -340 { |
| lab=vssa1} |
| C {devices/iopin.sym} 3240 -470 0 0 {name=p1 lab=vdda1} |
| C {devices/iopin.sym} 3240 -440 0 0 {name=p2 lab=vdda2} |
| C {devices/iopin.sym} 3240 -410 0 0 {name=p3 lab=vssa1} |
| C {devices/iopin.sym} 3240 -380 0 0 {name=p4 lab=vssa2} |
| C {devices/iopin.sym} 3240 -350 0 0 {name=p5 lab=vccd1} |
| C {devices/iopin.sym} 3240 -320 0 0 {name=p6 lab=vccd2} |
| C {devices/iopin.sym} 3240 -290 0 0 {name=p7 lab=vssd1} |
| C {devices/iopin.sym} 3240 -260 0 0 {name=p8 lab=vssd2} |
| C {devices/ipin.sym} 3290 -190 0 0 {name=p9 lab=wb_clk_i} |
| C {devices/ipin.sym} 3290 -160 0 0 {name=p10 lab=wb_rst_i} |
| C {devices/ipin.sym} 3290 -130 0 0 {name=p11 lab=wbs_stb_i} |
| C {devices/ipin.sym} 3290 -100 0 0 {name=p12 lab=wbs_cyc_i} |
| C {devices/ipin.sym} 3290 -70 0 0 {name=p13 lab=wbs_we_i} |
| C {devices/ipin.sym} 3290 -40 0 0 {name=p14 lab=wbs_sel_i[3:0]} |
| C {devices/ipin.sym} 3290 -10 0 0 {name=p15 lab=wbs_dat_i[31:0]} |
| C {devices/ipin.sym} 3290 20 0 0 {name=p16 lab=wbs_adr_i[31:0]} |
| C {devices/opin.sym} 3280 80 0 0 {name=p17 lab=wbs_ack_o} |
| C {devices/opin.sym} 3280 110 0 0 {name=p18 lab=wbs_dat_o[31:0]} |
| C {devices/ipin.sym} 3290 150 0 0 {name=p19 lab=la_data_in[127:0]} |
| C {devices/opin.sym} 3280 180 0 0 {name=p20 lab=la_data_out[127:0]} |
| C {devices/ipin.sym} 3290 260 0 0 {name=p21 lab=io_in[26:0]} |
| C {devices/ipin.sym} 3290 290 0 0 {name=p22 lab=io_in_3v3[26:0]} |
| C {devices/ipin.sym} 3280 570 0 0 {name=p23 lab=user_clock2} |
| C {devices/opin.sym} 3280 320 0 0 {name=p24 lab=io_out[26:0]} |
| C {devices/opin.sym} 3280 350 0 0 {name=p25 lab=io_oeb[26:0]} |
| C {devices/iopin.sym} 3250 410 0 0 {name=p26 lab=gpio_analog[17:0]} |
| C {devices/iopin.sym} 3250 440 0 0 {name=p27 lab=gpio_noesd[17:0]} |
| C {devices/iopin.sym} 3250 470 0 0 {name=p29 lab=io_analog[10:0]} |
| C {devices/iopin.sym} 3250 500 0 0 {name=p30 lab=io_clamp_high[2:0]} |
| C {devices/iopin.sym} 3250 530 0 0 {name=p31 lab=io_clamp_low[2:0]} |
| C {devices/opin.sym} 3270 600 0 0 {name=p32 lab=user_irq[2:0]} |
| C {devices/ipin.sym} 3290 210 0 0 {name=p28 lab=la_oenb[127:0]} |
| C {comparator.sym} 3880 -150 0 0 {name=x1} |
| C {devices/lab_pin.sym} 4100 -190 2 0 {name=l1 sig_type=std_logic lab=vccd1} |
| C {devices/lab_pin.sym} 4100 -170 0 1 {name=l2 sig_type=std_logic lab=vssa1} |
| C {devices/lab_pin.sym} 4100 -150 2 0 {name=l3 sig_type=std_logic lab=io_analog[3]} |
| C {devices/lab_pin.sym} 4100 -110 2 0 {name=l4 sig_type=std_logic lab=io_analog[2]} |
| C {devices/lab_pin.sym} 4100 -130 2 0 {name=l5 sig_type=std_logic lab=io_analog[8]} |
| C {devices/lab_pin.sym} 3730 -190 0 0 {name=l7 sig_type=std_logic lab=io_analog[5]} |
| C {devices/lab_pin.sym} 3730 -170 0 0 {name=l8 sig_type=std_logic lab=io_analog[6]} |
| C {devices/lab_pin.sym} 3530 500 0 0 {name=l9 sig_type=std_logic lab=vccd1} |
| C {devices/lab_pin.sym} 3530 540 2 1 {name=l10 sig_type=std_logic lab=vssa1} |
| C {devices/lab_pin.sym} 3580 500 2 0 {name=l11 sig_type=std_logic lab=io_clamp_high[2:1]} |
| C {devices/lab_pin.sym} 3580 540 2 0 {name=l12 sig_type=std_logic lab=io_clamp_high[2:1]} |
| C {sky130_fd_pr/nfet_01v8.sym} 3990 -390 0 0 {name=M40 |
| L=0.15 |
| W=1 |
| nf=1 |
| mult=1 |
| ad="'int((nf+1)/2) * W/nf * 0.29'" |
| pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" |
| as="'int((nf+2)/2) * W/nf * 0.29'" |
| ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" |
| nrd="'0.29 / W'" nrs="'0.29 / W'" |
| sa=0 sb=0 sd=0 |
| model=nfet_01v8 |
| spiceprefix=X |
| } |
| C {sky130_fd_pr/pfet_01v8.sym} 3990 -490 0 0 {name=M41 |
| L=0.15 |
| W=2 |
| nf=1 |
| mult=1 |
| ad="'int((nf+1)/2) * W/nf * 0.29'" |
| pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" |
| as="'int((nf+2)/2) * W/nf * 0.29'" |
| ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" |
| nrd="'0.29 / W'" nrs="'0.29 / W'" |
| sa=0 sb=0 sd=0 |
| model=pfet_01v8 |
| spiceprefix=X |
| } |
| C {sky130_fd_pr/nfet_01v8.sym} 4150 -390 0 0 {name=M42 |
| L=0.15 |
| W=2 |
| nf=1 |
| mult=1 |
| ad="'int((nf+1)/2) * W/nf * 0.29'" |
| pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" |
| as="'int((nf+2)/2) * W/nf * 0.29'" |
| ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" |
| nrd="'0.29 / W'" nrs="'0.29 / W'" |
| sa=0 sb=0 sd=0 |
| model=nfet_01v8 |
| spiceprefix=X |
| } |
| C {sky130_fd_pr/pfet_01v8.sym} 4150 -490 0 0 {name=M43 |
| L=0.15 |
| W=4 |
| nf=1 |
| mult=1 |
| ad="'int((nf+1)/2) * W/nf * 0.29'" |
| pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" |
| as="'int((nf+2)/2) * W/nf * 0.29'" |
| ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" |
| nrd="'0.29 / W'" nrs="'0.29 / W'" |
| sa=0 sb=0 sd=0 |
| model=pfet_01v8 |
| spiceprefix=X |
| } |
| C {sky130_fd_pr/nfet_01v8.sym} 4310 -390 0 0 {name=M44 |
| L=0.15 |
| W=8 |
| nf=1 |
| mult=1 |
| ad="'int((nf+1)/2) * W/nf * 0.29'" |
| pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" |
| as="'int((nf+2)/2) * W/nf * 0.29'" |
| ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" |
| nrd="'0.29 / W'" nrs="'0.29 / W'" |
| sa=0 sb=0 sd=0 |
| model=nfet_01v8 |
| spiceprefix=X |
| } |
| C {sky130_fd_pr/pfet_01v8.sym} 4310 -490 0 0 {name=M45 |
| L=0.15 |
| W=16 |
| nf=1 |
| mult=1 |
| ad="'int((nf+1)/2) * W/nf * 0.29'" |
| pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" |
| as="'int((nf+2)/2) * W/nf * 0.29'" |
| ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" |
| nrd="'0.29 / W'" nrs="'0.29 / W'" |
| sa=0 sb=0 sd=0 |
| model=pfet_01v8 |
| spiceprefix=X |
| } |
| C {sky130_fd_pr/nfet_01v8.sym} 4460 -390 0 0 {name=M46 |
| L=0.15 |
| W=16 |
| nf=1 |
| mult=1 |
| ad="'int((nf+1)/2) * W/nf * 0.29'" |
| pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" |
| as="'int((nf+2)/2) * W/nf * 0.29'" |
| ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" |
| nrd="'0.29 / W'" nrs="'0.29 / W'" |
| sa=0 sb=0 sd=0 |
| model=nfet_01v8 |
| spiceprefix=X |
| } |
| C {sky130_fd_pr/pfet_01v8.sym} 4460 -490 0 0 {name=M47 |
| L=0.15 |
| W=32 |
| nf=1 |
| mult=1 |
| ad="'int((nf+1)/2) * W/nf * 0.29'" |
| pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" |
| as="'int((nf+2)/2) * W/nf * 0.29'" |
| ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" |
| nrd="'0.29 / W'" nrs="'0.29 / W'" |
| sa=0 sb=0 sd=0 |
| model=pfet_01v8 |
| spiceprefix=X |
| } |
| C {sky130_fd_pr/nfet_01v8.sym} 3740 -390 0 0 {name=M1 |
| L=0.15 |
| W=1 |
| nf=1 |
| mult=1 |
| ad="'int((nf+1)/2) * W/nf * 0.29'" |
| pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" |
| as="'int((nf+2)/2) * W/nf * 0.29'" |
| ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" |
| nrd="'0.29 / W'" nrs="'0.29 / W'" |
| sa=0 sb=0 sd=0 |
| model=nfet_01v8 |
| spiceprefix=X |
| } |
| C {sky130_fd_pr/pfet_01v8.sym} 3740 -490 0 0 {name=M2 |
| L=0.15 |
| W=2 |
| nf=1 |
| mult=1 |
| ad="'int((nf+1)/2) * W/nf * 0.29'" |
| pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" |
| as="'int((nf+2)/2) * W/nf * 0.29'" |
| ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" |
| nrd="'0.29 / W'" nrs="'0.29 / W'" |
| sa=0 sb=0 sd=0 |
| model=pfet_01v8 |
| spiceprefix=X |
| } |
| C {devices/lab_pin.sym} 3670 -440 0 0 {name=l6 sig_type=std_logic lab=io_analog[8]} |
| C {devices/lab_pin.sym} 4570 -440 2 0 {name=l13 sig_type=std_logic lab=io_analog[1]} |
| C {devices/lab_pin.sym} 4200 -560 1 0 {name=l14 sig_type=std_logic lab=vccd1} |
| C {devices/lab_pin.sym} 4220 -340 1 1 {name=l15 sig_type=std_logic lab=vssa1} |