changed irq pin error

verilog/rtl/soc_now_caravel_top.v

diff --git a/verilog/rtl/soc_now_caravel_top.v b/verilog/rtl/soc_now_caravel_top.v
index 9b0186b..01887dd 100644
--- a/verilog/rtl/soc_now_caravel_top.v
+++ b/verilog/rtl/soc_now_caravel_top.v
@@ -89,7 +89,7 @@
 assign gpio_i = io_in[37:6];
 assign io_oeb[37:6] = ~gpio_oe;
 
-Caravel_Top mprj (
+Caravel_Top soc_top (
 `ifdef USE_POWER_PINS
 	.vccd1(vccd1),	// User area 1 1.8V power
 	.vssd1(vssd1),	// User area 1 digital ground

verilog/rtl/user_project_wrapper.v

diff --git a/verilog/rtl/user_project_wrapper.v b/verilog/rtl/user_project_wrapper.v
index 662fff0..1c5f1c6 100644
--- a/verilog/rtl/user_project_wrapper.v
+++ b/verilog/rtl/user_project_wrapper.v
@@ -115,7 +115,7 @@
     .io_oeb(io_oeb),
 
     // IRQ
-    .irq(user_irq)
+    .user_irq(user_irq)
 );
 
 endmodule	// user_project_wrapper