blob: 3d8426c55d1e44742f3e8cf12ca96f11576d74e1 [file] [log] [blame]
VERSION 5.7 ;
NOWIREEXTENSIONATPIN ON ;
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
MACRO Flash
CLASS BLOCK ;
FOREIGN Flash ;
ORIGIN 0.000 0.000 ;
SIZE 300.000 BY 200.000 ;
PIN flash_csb
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 18.490 196.000 18.770 200.000 ;
END
END flash_csb
PIN flash_io0_read
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 55.750 196.000 56.030 200.000 ;
END
END flash_io0_read
PIN flash_io0_we
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 93.470 196.000 93.750 200.000 ;
END
END flash_io0_we
PIN flash_io0_write
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 130.730 196.000 131.010 200.000 ;
END
END flash_io0_write
PIN flash_io1_read
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 168.450 196.000 168.730 200.000 ;
END
END flash_io1_read
PIN flash_io1_we
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 205.710 196.000 205.990 200.000 ;
END
END flash_io1_we
PIN flash_io1_write
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 243.430 196.000 243.710 200.000 ;
END
END flash_io1_write
PIN flash_sck
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 280.690 196.000 280.970 200.000 ;
END
END flash_sck
PIN sram_addr0[0]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 12.970 0.000 13.250 4.000 ;
END
END sram_addr0[0]
PIN sram_addr0[1]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 27.690 0.000 27.970 4.000 ;
END
END sram_addr0[1]
PIN sram_addr0[2]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 42.410 0.000 42.690 4.000 ;
END
END sram_addr0[2]
PIN sram_addr0[3]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 56.670 0.000 56.950 4.000 ;
END
END sram_addr0[3]
PIN sram_addr0[4]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 71.390 0.000 71.670 4.000 ;
END
END sram_addr0[4]
PIN sram_addr0[5]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 83.810 0.000 84.090 4.000 ;
END
END sram_addr0[5]
PIN sram_addr0[6]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 95.770 0.000 96.050 4.000 ;
END
END sram_addr0[6]
PIN sram_addr0[7]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 108.190 0.000 108.470 4.000 ;
END
END sram_addr0[7]
PIN sram_addr0[8]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 120.150 0.000 120.430 4.000 ;
END
END sram_addr0[8]
PIN sram_addr1[0]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 15.270 0.000 15.550 4.000 ;
END
END sram_addr1[0]
PIN sram_addr1[1]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 29.990 0.000 30.270 4.000 ;
END
END sram_addr1[1]
PIN sram_addr1[2]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 44.710 0.000 44.990 4.000 ;
END
END sram_addr1[2]
PIN sram_addr1[3]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 59.430 0.000 59.710 4.000 ;
END
END sram_addr1[3]
PIN sram_addr1[4]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 74.150 0.000 74.430 4.000 ;
END
END sram_addr1[4]
PIN sram_addr1[5]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 86.110 0.000 86.390 4.000 ;
END
END sram_addr1[5]
PIN sram_addr1[6]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 98.530 0.000 98.810 4.000 ;
END
END sram_addr1[6]
PIN sram_addr1[7]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 110.490 0.000 110.770 4.000 ;
END
END sram_addr1[7]
PIN sram_addr1[8]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 122.910 0.000 123.190 4.000 ;
END
END sram_addr1[8]
PIN sram_clk0
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 1.010 0.000 1.290 4.000 ;
END
END sram_clk0
PIN sram_clk1
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 3.310 0.000 3.590 4.000 ;
END
END sram_clk1
PIN sram_csb0
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 5.610 0.000 5.890 4.000 ;
END
END sram_csb0
PIN sram_csb1
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 7.910 0.000 8.190 4.000 ;
END
END sram_csb1
PIN sram_din0[0]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 18.030 0.000 18.310 4.000 ;
END
END sram_din0[0]
PIN sram_din0[10]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 139.930 0.000 140.210 4.000 ;
END
END sram_din0[10]
PIN sram_din0[11]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 147.290 0.000 147.570 4.000 ;
END
END sram_din0[11]
PIN sram_din0[12]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 154.190 0.000 154.470 4.000 ;
END
END sram_din0[12]
PIN sram_din0[13]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 161.550 0.000 161.830 4.000 ;
END
END sram_din0[13]
PIN sram_din0[14]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 168.910 0.000 169.190 4.000 ;
END
END sram_din0[14]
PIN sram_din0[15]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 176.270 0.000 176.550 4.000 ;
END
END sram_din0[15]
PIN sram_din0[16]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 183.630 0.000 183.910 4.000 ;
END
END sram_din0[16]
PIN sram_din0[17]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 190.990 0.000 191.270 4.000 ;
END
END sram_din0[17]
PIN sram_din0[18]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 198.350 0.000 198.630 4.000 ;
END
END sram_din0[18]
PIN sram_din0[19]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 205.710 0.000 205.990 4.000 ;
END
END sram_din0[19]
PIN sram_din0[1]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 32.290 0.000 32.570 4.000 ;
END
END sram_din0[1]
PIN sram_din0[20]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 213.070 0.000 213.350 4.000 ;
END
END sram_din0[20]
PIN sram_din0[21]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 220.430 0.000 220.710 4.000 ;
END
END sram_din0[21]
PIN sram_din0[22]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 227.330 0.000 227.610 4.000 ;
END
END sram_din0[22]
PIN sram_din0[23]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 234.690 0.000 234.970 4.000 ;
END
END sram_din0[23]
PIN sram_din0[24]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 242.050 0.000 242.330 4.000 ;
END
END sram_din0[24]
PIN sram_din0[25]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 249.410 0.000 249.690 4.000 ;
END
END sram_din0[25]
PIN sram_din0[26]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 256.770 0.000 257.050 4.000 ;
END
END sram_din0[26]
PIN sram_din0[27]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 264.130 0.000 264.410 4.000 ;
END
END sram_din0[27]
PIN sram_din0[28]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 271.490 0.000 271.770 4.000 ;
END
END sram_din0[28]
PIN sram_din0[29]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 278.850 0.000 279.130 4.000 ;
END
END sram_din0[29]
PIN sram_din0[2]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 47.010 0.000 47.290 4.000 ;
END
END sram_din0[2]
PIN sram_din0[30]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 286.210 0.000 286.490 4.000 ;
END
END sram_din0[30]
PIN sram_din0[31]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 293.570 0.000 293.850 4.000 ;
END
END sram_din0[31]
PIN sram_din0[3]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 61.730 0.000 62.010 4.000 ;
END
END sram_din0[3]
PIN sram_din0[4]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 76.450 0.000 76.730 4.000 ;
END
END sram_din0[4]
PIN sram_din0[5]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 88.410 0.000 88.690 4.000 ;
END
END sram_din0[5]
PIN sram_din0[6]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 100.830 0.000 101.110 4.000 ;
END
END sram_din0[6]
PIN sram_din0[7]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 112.790 0.000 113.070 4.000 ;
END
END sram_din0[7]
PIN sram_din0[8]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 125.210 0.000 125.490 4.000 ;
END
END sram_din0[8]
PIN sram_din0[9]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 132.570 0.000 132.850 4.000 ;
END
END sram_din0[9]
PIN sram_dout0[0]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 20.330 0.000 20.610 4.000 ;
END
END sram_dout0[0]
PIN sram_dout0[10]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 142.230 0.000 142.510 4.000 ;
END
END sram_dout0[10]
PIN sram_dout0[11]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 149.590 0.000 149.870 4.000 ;
END
END sram_dout0[11]
PIN sram_dout0[12]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 156.950 0.000 157.230 4.000 ;
END
END sram_dout0[12]
PIN sram_dout0[13]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 164.310 0.000 164.590 4.000 ;
END
END sram_dout0[13]
PIN sram_dout0[14]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 171.670 0.000 171.950 4.000 ;
END
END sram_dout0[14]
PIN sram_dout0[15]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 178.570 0.000 178.850 4.000 ;
END
END sram_dout0[15]
PIN sram_dout0[16]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 185.930 0.000 186.210 4.000 ;
END
END sram_dout0[16]
PIN sram_dout0[17]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 193.290 0.000 193.570 4.000 ;
END
END sram_dout0[17]
PIN sram_dout0[18]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 200.650 0.000 200.930 4.000 ;
END
END sram_dout0[18]
PIN sram_dout0[19]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 208.010 0.000 208.290 4.000 ;
END
END sram_dout0[19]
PIN sram_dout0[1]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 35.050 0.000 35.330 4.000 ;
END
END sram_dout0[1]
PIN sram_dout0[20]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 215.370 0.000 215.650 4.000 ;
END
END sram_dout0[20]
PIN sram_dout0[21]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 222.730 0.000 223.010 4.000 ;
END
END sram_dout0[21]
PIN sram_dout0[22]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 230.090 0.000 230.370 4.000 ;
END
END sram_dout0[22]
PIN sram_dout0[23]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 237.450 0.000 237.730 4.000 ;
END
END sram_dout0[23]
PIN sram_dout0[24]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 244.810 0.000 245.090 4.000 ;
END
END sram_dout0[24]
PIN sram_dout0[25]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 251.710 0.000 251.990 4.000 ;
END
END sram_dout0[25]
PIN sram_dout0[26]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 259.070 0.000 259.350 4.000 ;
END
END sram_dout0[26]
PIN sram_dout0[27]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 266.430 0.000 266.710 4.000 ;
END
END sram_dout0[27]
PIN sram_dout0[28]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 273.790 0.000 274.070 4.000 ;
END
END sram_dout0[28]
PIN sram_dout0[29]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 281.150 0.000 281.430 4.000 ;
END
END sram_dout0[29]
PIN sram_dout0[2]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 49.770 0.000 50.050 4.000 ;
END
END sram_dout0[2]
PIN sram_dout0[30]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 288.510 0.000 288.790 4.000 ;
END
END sram_dout0[30]
PIN sram_dout0[31]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 295.870 0.000 296.150 4.000 ;
END
END sram_dout0[31]
PIN sram_dout0[3]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 64.030 0.000 64.310 4.000 ;
END
END sram_dout0[3]
PIN sram_dout0[4]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 78.750 0.000 79.030 4.000 ;
END
END sram_dout0[4]
PIN sram_dout0[5]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 91.170 0.000 91.450 4.000 ;
END
END sram_dout0[5]
PIN sram_dout0[6]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 103.130 0.000 103.410 4.000 ;
END
END sram_dout0[6]
PIN sram_dout0[7]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 115.550 0.000 115.830 4.000 ;
END
END sram_dout0[7]
PIN sram_dout0[8]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 127.510 0.000 127.790 4.000 ;
END
END sram_dout0[8]
PIN sram_dout0[9]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 134.870 0.000 135.150 4.000 ;
END
END sram_dout0[9]
PIN sram_dout1[0]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 22.630 0.000 22.910 4.000 ;
END
END sram_dout1[0]
PIN sram_dout1[10]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 144.530 0.000 144.810 4.000 ;
END
END sram_dout1[10]
PIN sram_dout1[11]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 151.890 0.000 152.170 4.000 ;
END
END sram_dout1[11]
PIN sram_dout1[12]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 159.250 0.000 159.530 4.000 ;
END
END sram_dout1[12]
PIN sram_dout1[13]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 166.610 0.000 166.890 4.000 ;
END
END sram_dout1[13]
PIN sram_dout1[14]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 173.970 0.000 174.250 4.000 ;
END
END sram_dout1[14]
PIN sram_dout1[15]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 181.330 0.000 181.610 4.000 ;
END
END sram_dout1[15]
PIN sram_dout1[16]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 188.690 0.000 188.970 4.000 ;
END
END sram_dout1[16]
PIN sram_dout1[17]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 196.050 0.000 196.330 4.000 ;
END
END sram_dout1[17]
PIN sram_dout1[18]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 202.950 0.000 203.230 4.000 ;
END
END sram_dout1[18]
PIN sram_dout1[19]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 210.310 0.000 210.590 4.000 ;
END
END sram_dout1[19]
PIN sram_dout1[1]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 37.350 0.000 37.630 4.000 ;
END
END sram_dout1[1]
PIN sram_dout1[20]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 217.670 0.000 217.950 4.000 ;
END
END sram_dout1[20]
PIN sram_dout1[21]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 225.030 0.000 225.310 4.000 ;
END
END sram_dout1[21]
PIN sram_dout1[22]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 232.390 0.000 232.670 4.000 ;
END
END sram_dout1[22]
PIN sram_dout1[23]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 239.750 0.000 240.030 4.000 ;
END
END sram_dout1[23]
PIN sram_dout1[24]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 247.110 0.000 247.390 4.000 ;
END
END sram_dout1[24]
PIN sram_dout1[25]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 254.470 0.000 254.750 4.000 ;
END
END sram_dout1[25]
PIN sram_dout1[26]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 261.830 0.000 262.110 4.000 ;
END
END sram_dout1[26]
PIN sram_dout1[27]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 269.190 0.000 269.470 4.000 ;
END
END sram_dout1[27]
PIN sram_dout1[28]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 276.090 0.000 276.370 4.000 ;
END
END sram_dout1[28]
PIN sram_dout1[29]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 283.450 0.000 283.730 4.000 ;
END
END sram_dout1[29]
PIN sram_dout1[2]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 52.070 0.000 52.350 4.000 ;
END
END sram_dout1[2]
PIN sram_dout1[30]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 290.810 0.000 291.090 4.000 ;
END
END sram_dout1[30]
PIN sram_dout1[31]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 298.170 0.000 298.450 4.000 ;
END
END sram_dout1[31]
PIN sram_dout1[3]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 66.790 0.000 67.070 4.000 ;
END
END sram_dout1[3]
PIN sram_dout1[4]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 81.050 0.000 81.330 4.000 ;
END
END sram_dout1[4]
PIN sram_dout1[5]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 93.470 0.000 93.750 4.000 ;
END
END sram_dout1[5]
PIN sram_dout1[6]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 105.430 0.000 105.710 4.000 ;
END
END sram_dout1[6]
PIN sram_dout1[7]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 117.850 0.000 118.130 4.000 ;
END
END sram_dout1[7]
PIN sram_dout1[8]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 129.810 0.000 130.090 4.000 ;
END
END sram_dout1[8]
PIN sram_dout1[9]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 137.170 0.000 137.450 4.000 ;
END
END sram_dout1[9]
PIN sram_web0
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 10.670 0.000 10.950 4.000 ;
END
END sram_web0
PIN sram_wmask0[0]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 25.390 0.000 25.670 4.000 ;
END
END sram_wmask0[0]
PIN sram_wmask0[1]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 39.650 0.000 39.930 4.000 ;
END
END sram_wmask0[1]
PIN sram_wmask0[2]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 54.370 0.000 54.650 4.000 ;
END
END sram_wmask0[2]
PIN sram_wmask0[3]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met2 ;
RECT 69.090 0.000 69.370 4.000 ;
END
END sram_wmask0[3]
PIN vccd1
DIRECTION INOUT ;
USE POWER ;
PORT
LAYER met4 ;
RECT 21.040 10.640 22.640 187.920 ;
END
PORT
LAYER met4 ;
RECT 174.640 10.640 176.240 187.920 ;
END
END vccd1
PIN vssd1
DIRECTION INOUT ;
USE GROUND ;
PORT
LAYER met4 ;
RECT 97.840 10.640 99.440 187.920 ;
END
PORT
LAYER met4 ;
RECT 251.440 10.640 253.040 187.920 ;
END
END vssd1
PIN wb_ack_o
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 0.720 4.000 1.320 ;
END
END wb_ack_o
PIN wb_adr_i[0]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 16.360 4.000 16.960 ;
END
END wb_adr_i[0]
PIN wb_adr_i[10]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 84.360 4.000 84.960 ;
END
END wb_adr_i[10]
PIN wb_adr_i[11]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 90.480 4.000 91.080 ;
END
END wb_adr_i[11]
PIN wb_adr_i[12]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 96.600 4.000 97.200 ;
END
END wb_adr_i[12]
PIN wb_adr_i[13]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 102.040 4.000 102.640 ;
END
END wb_adr_i[13]
PIN wb_adr_i[14]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 108.160 4.000 108.760 ;
END
END wb_adr_i[14]
PIN wb_adr_i[15]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 114.280 4.000 114.880 ;
END
END wb_adr_i[15]
PIN wb_adr_i[16]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 120.400 4.000 121.000 ;
END
END wb_adr_i[16]
PIN wb_adr_i[17]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 126.520 4.000 127.120 ;
END
END wb_adr_i[17]
PIN wb_adr_i[18]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 132.640 4.000 133.240 ;
END
END wb_adr_i[18]
PIN wb_adr_i[19]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 138.080 4.000 138.680 ;
END
END wb_adr_i[19]
PIN wb_adr_i[1]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 24.520 4.000 25.120 ;
END
END wb_adr_i[1]
PIN wb_adr_i[20]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 144.200 4.000 144.800 ;
END
END wb_adr_i[20]
PIN wb_adr_i[21]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 150.320 4.000 150.920 ;
END
END wb_adr_i[21]
PIN wb_adr_i[22]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 156.440 4.000 157.040 ;
END
END wb_adr_i[22]
PIN wb_adr_i[23]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 162.560 4.000 163.160 ;
END
END wb_adr_i[23]
PIN wb_adr_i[2]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 32.680 4.000 33.280 ;
END
END wb_adr_i[2]
PIN wb_adr_i[3]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 40.160 4.000 40.760 ;
END
END wb_adr_i[3]
PIN wb_adr_i[4]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 48.320 4.000 48.920 ;
END
END wb_adr_i[4]
PIN wb_adr_i[5]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 54.440 4.000 55.040 ;
END
END wb_adr_i[5]
PIN wb_adr_i[6]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 60.560 4.000 61.160 ;
END
END wb_adr_i[6]
PIN wb_adr_i[7]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 66.680 4.000 67.280 ;
END
END wb_adr_i[7]
PIN wb_adr_i[8]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 72.120 4.000 72.720 ;
END
END wb_adr_i[8]
PIN wb_adr_i[9]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 78.240 4.000 78.840 ;
END
END wb_adr_i[9]
PIN wb_clk_i
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 2.080 4.000 2.680 ;
END
END wb_clk_i
PIN wb_cyc_i
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 4.120 4.000 4.720 ;
END
END wb_cyc_i
PIN wb_data_i[0]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 18.400 4.000 19.000 ;
END
END wb_data_i[0]
PIN wb_data_i[10]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 86.400 4.000 87.000 ;
END
END wb_data_i[10]
PIN wb_data_i[11]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 92.520 4.000 93.120 ;
END
END wb_data_i[11]
PIN wb_data_i[12]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 98.640 4.000 99.240 ;
END
END wb_data_i[12]
PIN wb_data_i[13]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 104.080 4.000 104.680 ;
END
END wb_data_i[13]
PIN wb_data_i[14]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 110.200 4.000 110.800 ;
END
END wb_data_i[14]
PIN wb_data_i[15]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 116.320 4.000 116.920 ;
END
END wb_data_i[15]
PIN wb_data_i[16]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 122.440 4.000 123.040 ;
END
END wb_data_i[16]
PIN wb_data_i[17]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 128.560 4.000 129.160 ;
END
END wb_data_i[17]
PIN wb_data_i[18]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 134.000 4.000 134.600 ;
END
END wb_data_i[18]
PIN wb_data_i[19]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 140.120 4.000 140.720 ;
END
END wb_data_i[19]
PIN wb_data_i[1]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 26.560 4.000 27.160 ;
END
END wb_data_i[1]
PIN wb_data_i[20]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 146.240 4.000 146.840 ;
END
END wb_data_i[20]
PIN wb_data_i[21]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 152.360 4.000 152.960 ;
END
END wb_data_i[21]
PIN wb_data_i[22]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 158.480 4.000 159.080 ;
END
END wb_data_i[22]
PIN wb_data_i[23]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 164.600 4.000 165.200 ;
END
END wb_data_i[23]
PIN wb_data_i[24]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 168.000 4.000 168.600 ;
END
END wb_data_i[24]
PIN wb_data_i[25]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 172.080 4.000 172.680 ;
END
END wb_data_i[25]
PIN wb_data_i[26]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 176.160 4.000 176.760 ;
END
END wb_data_i[26]
PIN wb_data_i[27]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 180.240 4.000 180.840 ;
END
END wb_data_i[27]
PIN wb_data_i[28]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 184.320 4.000 184.920 ;
END
END wb_data_i[28]
PIN wb_data_i[29]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 188.400 4.000 189.000 ;
END
END wb_data_i[29]
PIN wb_data_i[2]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 34.040 4.000 34.640 ;
END
END wb_data_i[2]
PIN wb_data_i[30]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 192.480 4.000 193.080 ;
END
END wb_data_i[30]
PIN wb_data_i[31]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 196.560 4.000 197.160 ;
END
END wb_data_i[31]
PIN wb_data_i[3]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 42.200 4.000 42.800 ;
END
END wb_data_i[3]
PIN wb_data_i[4]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 50.360 4.000 50.960 ;
END
END wb_data_i[4]
PIN wb_data_i[5]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 56.480 4.000 57.080 ;
END
END wb_data_i[5]
PIN wb_data_i[6]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 62.600 4.000 63.200 ;
END
END wb_data_i[6]
PIN wb_data_i[7]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 68.040 4.000 68.640 ;
END
END wb_data_i[7]
PIN wb_data_i[8]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 74.160 4.000 74.760 ;
END
END wb_data_i[8]
PIN wb_data_i[9]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 80.280 4.000 80.880 ;
END
END wb_data_i[9]
PIN wb_data_o[0]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 20.440 4.000 21.040 ;
END
END wb_data_o[0]
PIN wb_data_o[10]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 88.440 4.000 89.040 ;
END
END wb_data_o[10]
PIN wb_data_o[11]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 94.560 4.000 95.160 ;
END
END wb_data_o[11]
PIN wb_data_o[12]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 100.680 4.000 101.280 ;
END
END wb_data_o[12]
PIN wb_data_o[13]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 106.120 4.000 106.720 ;
END
END wb_data_o[13]
PIN wb_data_o[14]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 112.240 4.000 112.840 ;
END
END wb_data_o[14]
PIN wb_data_o[15]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 118.360 4.000 118.960 ;
END
END wb_data_o[15]
PIN wb_data_o[16]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 124.480 4.000 125.080 ;
END
END wb_data_o[16]
PIN wb_data_o[17]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 130.600 4.000 131.200 ;
END
END wb_data_o[17]
PIN wb_data_o[18]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 136.040 4.000 136.640 ;
END
END wb_data_o[18]
PIN wb_data_o[19]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 142.160 4.000 142.760 ;
END
END wb_data_o[19]
PIN wb_data_o[1]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 28.600 4.000 29.200 ;
END
END wb_data_o[1]
PIN wb_data_o[20]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 148.280 4.000 148.880 ;
END
END wb_data_o[20]
PIN wb_data_o[21]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 154.400 4.000 155.000 ;
END
END wb_data_o[21]
PIN wb_data_o[22]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 160.520 4.000 161.120 ;
END
END wb_data_o[22]
PIN wb_data_o[23]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 166.640 4.000 167.240 ;
END
END wb_data_o[23]
PIN wb_data_o[24]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 170.040 4.000 170.640 ;
END
END wb_data_o[24]
PIN wb_data_o[25]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 174.120 4.000 174.720 ;
END
END wb_data_o[25]
PIN wb_data_o[26]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 178.200 4.000 178.800 ;
END
END wb_data_o[26]
PIN wb_data_o[27]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 182.280 4.000 182.880 ;
END
END wb_data_o[27]
PIN wb_data_o[28]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 186.360 4.000 186.960 ;
END
END wb_data_o[28]
PIN wb_data_o[29]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 190.440 4.000 191.040 ;
END
END wb_data_o[29]
PIN wb_data_o[2]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 36.080 4.000 36.680 ;
END
END wb_data_o[2]
PIN wb_data_o[30]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 194.520 4.000 195.120 ;
END
END wb_data_o[30]
PIN wb_data_o[31]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 198.600 4.000 199.200 ;
END
END wb_data_o[31]
PIN wb_data_o[3]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 44.240 4.000 44.840 ;
END
END wb_data_o[3]
PIN wb_data_o[4]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 52.400 4.000 53.000 ;
END
END wb_data_o[4]
PIN wb_data_o[5]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 58.520 4.000 59.120 ;
END
END wb_data_o[5]
PIN wb_data_o[6]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 64.640 4.000 65.240 ;
END
END wb_data_o[6]
PIN wb_data_o[7]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 70.080 4.000 70.680 ;
END
END wb_data_o[7]
PIN wb_data_o[8]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 76.200 4.000 76.800 ;
END
END wb_data_o[8]
PIN wb_data_o[9]
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 82.320 4.000 82.920 ;
END
END wb_data_o[9]
PIN wb_error_o
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 6.160 4.000 6.760 ;
END
END wb_error_o
PIN wb_rst_i
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 8.200 4.000 8.800 ;
END
END wb_rst_i
PIN wb_sel_i[0]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 22.480 4.000 23.080 ;
END
END wb_sel_i[0]
PIN wb_sel_i[1]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 30.640 4.000 31.240 ;
END
END wb_sel_i[1]
PIN wb_sel_i[2]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 38.120 4.000 38.720 ;
END
END wb_sel_i[2]
PIN wb_sel_i[3]
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 46.280 4.000 46.880 ;
END
END wb_sel_i[3]
PIN wb_stall_o
DIRECTION OUTPUT TRISTATE ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 10.240 4.000 10.840 ;
END
END wb_stall_o
PIN wb_stb_i
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 12.280 4.000 12.880 ;
END
END wb_stb_i
PIN wb_we_i
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER met3 ;
RECT 0.000 14.320 4.000 14.920 ;
END
END wb_we_i
OBS
LAYER li1 ;
RECT 5.520 10.795 294.400 187.765 ;
LAYER met1 ;
RECT 0.990 7.520 298.470 187.920 ;
LAYER met2 ;
RECT 1.020 195.720 18.210 199.085 ;
RECT 19.050 195.720 55.470 199.085 ;
RECT 56.310 195.720 93.190 199.085 ;
RECT 94.030 195.720 130.450 199.085 ;
RECT 131.290 195.720 168.170 199.085 ;
RECT 169.010 195.720 205.430 199.085 ;
RECT 206.270 195.720 243.150 199.085 ;
RECT 243.990 195.720 280.410 199.085 ;
RECT 281.250 195.720 298.440 199.085 ;
RECT 1.020 4.280 298.440 195.720 ;
RECT 1.570 0.835 3.030 4.280 ;
RECT 3.870 0.835 5.330 4.280 ;
RECT 6.170 0.835 7.630 4.280 ;
RECT 8.470 0.835 10.390 4.280 ;
RECT 11.230 0.835 12.690 4.280 ;
RECT 13.530 0.835 14.990 4.280 ;
RECT 15.830 0.835 17.750 4.280 ;
RECT 18.590 0.835 20.050 4.280 ;
RECT 20.890 0.835 22.350 4.280 ;
RECT 23.190 0.835 25.110 4.280 ;
RECT 25.950 0.835 27.410 4.280 ;
RECT 28.250 0.835 29.710 4.280 ;
RECT 30.550 0.835 32.010 4.280 ;
RECT 32.850 0.835 34.770 4.280 ;
RECT 35.610 0.835 37.070 4.280 ;
RECT 37.910 0.835 39.370 4.280 ;
RECT 40.210 0.835 42.130 4.280 ;
RECT 42.970 0.835 44.430 4.280 ;
RECT 45.270 0.835 46.730 4.280 ;
RECT 47.570 0.835 49.490 4.280 ;
RECT 50.330 0.835 51.790 4.280 ;
RECT 52.630 0.835 54.090 4.280 ;
RECT 54.930 0.835 56.390 4.280 ;
RECT 57.230 0.835 59.150 4.280 ;
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END
END Flash
END LIBRARY