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foss-eda-tools / third_party / shuttle / sky130 / mpw-006 / slot-026 / e83dddde84e2e1ae81a4e397124e869a1e4a1a55 / verilog
  1. 1d231e8 Modified the xschem schematics so that the wrapper level correctly by Tim Edwards · 3 years, 3 months ago
  2. 521f2c3 Update include netlists by manarabdelaty · 3 years, 6 months ago
  3. ec3fafa Update Makefile to work with EF style by manarabdelaty · 3 years, 6 months ago
  4. fc2a55e Update Makefile PDK_PATH by manarabdelaty · 3 years, 6 months ago
  5. dd3d811 Doc updates by manarabdelaty · 3 years, 10 months ago
  6. 9b861b2 Add pattern to dv Makefile and drop obselete openlane wrapper dir by manarabdelaty · 3 years, 10 months ago
  7. a26abdd Redid the layout for the example analog project based on the updated by Tim Edwards · 3 years, 10 months ago
  8. a44a60b Preliminary work on the analog user project example. Added verilog RTL and by Tim Edwards · 3 years, 11 months ago
  9. 6af7408 Initial commit by manarabdelaty · 3 years, 11 months ago