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foss-eda-tools / third_party / shuttle / sky130 / mpw-006 / slot-026 / 6b13e6b65b5df85e9a4651ac270850b21c414c21 / verilog
  1. a7e428e moved netlist spice file to netgen folder to make the letlist pre-check happy by Carl Brando · 3 years ago
  2. 1d231e8 Modified the xschem schematics so that the wrapper level correctly by Tim Edwards · 3 years, 3 months ago
  3. 521f2c3 Update include netlists by manarabdelaty · 3 years, 6 months ago
  4. ec3fafa Update Makefile to work with EF style by manarabdelaty · 3 years, 6 months ago
  5. fc2a55e Update Makefile PDK_PATH by manarabdelaty · 3 years, 6 months ago
  6. dd3d811 Doc updates by manarabdelaty · 3 years, 10 months ago
  7. 9b861b2 Add pattern to dv Makefile and drop obselete openlane wrapper dir by manarabdelaty · 3 years, 10 months ago
  8. a26abdd Redid the layout for the example analog project based on the updated by Tim Edwards · 3 years, 10 months ago
  9. a44a60b Preliminary work on the analog user project example. Added verilog RTL and by Tim Edwards · 3 years, 11 months ago
  10. 6af7408 Initial commit by manarabdelaty · 3 years, 11 months ago