commit | 54cce38fe2ffa69f0f756e29c24ae1ad0467526a | [log] [tgz] |
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author | Charana Sonnadara <charanas@umd.edu> | Tue Jun 07 00:27:46 2022 -0400 |
committer | Charana Sonnadara <charanas@umd.edu> | Tue Jun 07 00:27:46 2022 -0400 |
tree | 74aee8d9ffd53157d7a33557c35d1bd3b58b088d | |
parent | 2e4f270825ee2a0b27aa35d593522f387439caeb [diff] |
updated C4 - lvs passing
The focus of this tape-out is integrating analog synapses. Specifically, we are integrating ReRAM based synapse and FG-based synapse. ReRAM based array is a 1T-1R strucuture with the goal of increasing the size of the array. FG synapses is built using the high voltage transistors present on the SKY130 process.