| Kesami Hagiwara | f9dcdf7 | 2022-05-29 23:29:30 +0900 | [diff] [blame] | 1 | +define+PRINTF_COND=1 |
| 2 | +define+RANDOMIZE_MEM_INIT |
| 3 | +define+RANDOMIZE_REG_INIT |
| 4 | +define+RANDOMIZE_DELAY=1 |
| 5 | +define+UART_HIGH_SPEED |
| 6 | +define+WAVEFORM |
| 7 | |
| 8 | # Caravel user project includes |
| 9 | -v $(USER_PROJECT_VERILOG)/gl/user_project_wrapper.v |
| 10 | -v $(USER_PROJECT_VERILOG)/gl/Marmot.v |
| 11 | |
| 12 | -v $(USER_PROJECT_VERILOG)/lib/sky130_sram_1kbyte_1rw1r_32x256_8.v |
| 13 | #-v $(USER_PROJECT_VERILOG)/lib/sky130_sram_2kbyte_1rw1r_32x512_8.v |
| 14 | |
| 15 | // SPI Flash model |
| 16 | +define+SPEEDSIM |
| 17 | -v $(USER_PROJECT_VERILOG)/dv/vip/MX25U3235F.v |
| 18 | |
| 19 | // SPI RAM model (protected, Questa is needed) |
| 20 | //-v $(USER_PROJECT_VERILOG)/dv/vip/APM_APS6404L-3SQN_SQPI_PSRAM_model_v2.9_encrypt.vp_modelsim |
| 21 | |
| 22 | // UART model |
| 23 | +incdir+$(USER_PROJECT_VERILOG)/dv/vip/uart |
| 24 | -v $(USER_PROJECT_VERILOG)/dv/vip/uart/uart_tb.v |
| 25 | |
