tree: 0983333b631f974ff0181077a4ceb8d2708a66a6 [path history] [tgz]
  1. docs/
  2. gds/
  3. mag/
  4. mpw_precheck/
  5. netgen/
  6. openlane/
  7. precheck_results/
  8. signoff/
  9. tapeout/
  10. verilog/
  11. xschem/
  12. info.yaml
  13. LICENSE
  14. Makefile
  15. README.md
README.md

CMOS Rail-To-Rail Comparator

This project is the implementation of a simple rail-to-rail comparator with its bias circuitry using Skywater 130nm technology. The purpose of this project is to test the open source tools provided with the PDK and to go through all the steps of the analog design flow. Two different circuits are instantiated in the analog version of the caravel:

  • A CMOS push-pull comparator with 2 differential pairs (NMOS and PMOS).
  • A bootstrap current reference.

CMOS Comparator

The schematic of the comparator was deisgned as follows : Comparator

Bias circuit

The schematic of the bias circuit was deisgned as follows : Comparator Bias

Simulation

We simulated the comparator with a voltage ramp at the negative input and a sinusoidal signal at the positive input. The output is a digital signal that triggers at the intersection of the 2 analog input signals. Simulation