| OpenROAD 79a46b62da64bbebc18f06b20c42211046de719a |
| This program is licensed under the BSD-3 license. See the LICENSE file for details. |
| Components of this program may be licensed under more restrictive licenses which must be honored. |
| [INFO ODB-0222] Reading LEF file: /home/serdar/Desktop/openram_demo/openram_openmpw/openlane/user_project_wrapper/runs/user_project_wrapper/tmp/merged.unpadded.nom.lef |
| [INFO ODB-0223] Created 13 technology layers |
| [INFO ODB-0224] Created 25 technology vias |
| [INFO ODB-0225] Created 442 library cells |
| [INFO ODB-0226] Finished LEF file: /home/serdar/Desktop/openram_demo/openram_openmpw/openlane/user_project_wrapper/runs/user_project_wrapper/tmp/merged.unpadded.nom.lef |
| [WARNING ORD-1011] LEF master sky130_sram_2kbyte_1rw1r_32x512_8 has no liberty cell. |
| if {[info exists ::env(CLOCK_PORT)] && $::env(CLOCK_PORT) != ""} { |
| create_clock [get_ports $::env(CLOCK_PORT)] -name $::env(CLOCK_PORT) -period $::env(CLOCK_PERIOD) |
| } else { |
| create_clock -name __VIRTUAL_CLK__ -period $::env(CLOCK_PERIOD) |
| set ::env(CLOCK_PORT) __VIRTUAL_CLK__ |
| } |
| set input_delay_value [expr $::env(CLOCK_PERIOD) * $::env(IO_PCT)] |
| set output_delay_value [expr $::env(CLOCK_PERIOD) * $::env(IO_PCT)] |
| puts "\[INFO\]: Setting output delay to: $output_delay_value" |
| [INFO]: Setting output delay to: 4.0 |
| puts "\[INFO\]: Setting input delay to: $input_delay_value" |
| [INFO]: Setting input delay to: 4.0 |
| set_max_fanout $::env(SYNTH_MAX_FANOUT) [current_design] |
| set clk_indx [lsearch [all_inputs] [get_port $::env(CLOCK_PORT)]] |
| #set rst_indx [lsearch [all_inputs] [get_port resetn]] |
| set all_inputs_wo_clk [lreplace [all_inputs] $clk_indx $clk_indx] |
| #set all_inputs_wo_clk_rst [lreplace $all_inputs_wo_clk $rst_indx $rst_indx] |
| set all_inputs_wo_clk_rst $all_inputs_wo_clk |
| # correct resetn |
| set_input_delay $input_delay_value -clock [get_clocks $::env(CLOCK_PORT)] $all_inputs_wo_clk_rst |
| #set_input_delay 0.0 -clock [get_clocks $::env(CLOCK_PORT)] {resetn} |
| set_output_delay $output_delay_value -clock [get_clocks $::env(CLOCK_PORT)] [all_outputs] |
| # set_max_delay 3 -from [all_inputs] -to * |
| # set_max_delay 3 -from * -to [all_outputs] |
| # TODO set this as parameter |
| set_driving_cell -lib_cell $::env(SYNTH_DRIVING_CELL) -pin $::env(SYNTH_DRIVING_CELL_PIN) [all_inputs] |
| set cap_load [expr $::env(SYNTH_CAP_LOAD) / 1000.0] |
| puts "\[INFO\]: Setting load to: $cap_load" |
| [INFO]: Setting load to: 0.033442 |
| set_load $cap_load [all_outputs] |
| puts "\[INFO\]: Setting clock uncertainity to: $::env(SYNTH_CLOCK_UNCERTAINITY)" |
| [INFO]: Setting clock uncertainity to: 0.25 |
| set_clock_uncertainty $::env(SYNTH_CLOCK_UNCERTAINITY) [get_clocks $::env(CLOCK_PORT)] |
| puts "\[INFO\]: Setting clock transition to: $::env(SYNTH_CLOCK_TRANSITION)" |
| [INFO]: Setting clock transition to: 0.15 |
| set_clock_transition $::env(SYNTH_CLOCK_TRANSITION) [get_clocks $::env(CLOCK_PORT)] |
| puts "\[INFO\]: Setting timing derate to: [expr {$::env(SYNTH_TIMING_DERATE) * 10}] %" |
| [INFO]: Setting timing derate to: 0.5 % |
| set_timing_derate -early [expr {1-$::env(SYNTH_TIMING_DERATE)}] |
| set_timing_derate -late [expr {1+$::env(SYNTH_TIMING_DERATE)}] |
| [INFO IFP-0001] Added 1286 rows of 6323 sites. |