blob: 9743c178fbbd5a2aaedc37a18a3d6ac60d92037e [file] [log] [blame]
Project Chip ID is: 439448
Setting Project Chip ID to: 0006b498
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!