blob: 2dedaf3cb77f9e15052f64b3c34cf8f3333bd85f [file] [log] [blame]
Project Chip ID is: 442817
Setting Project Chip ID to: 0006c1c1
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!