qspim update
diff --git a/openlane/qspim/config.tcl b/openlane/qspim/config.tcl index 34b0101..d8f77f5 100755 --- a/openlane/qspim/config.tcl +++ b/openlane/qspim/config.tcl
@@ -74,7 +74,7 @@ set ::env(DIE_AREA) "0 0 400 550" set ::env(PL_TIME_DRIVEN) 1 -set ::env(PL_TARGET_DENSITY) "0.40" +set ::env(PL_TARGET_DENSITY) "0.42" # If you're going to use multiple power domains, then keep this disabled. set ::env(RUN_CVC) 0
diff --git a/openlane/qspim/pin_order.cfg b/openlane/qspim/pin_order.cfg index 3ebdd7a..233a7ce 100644 --- a/openlane/qspim/pin_order.cfg +++ b/openlane/qspim/pin_order.cfg
@@ -44,7 +44,10 @@ spi_sdo\[1\] spi_sdo\[0\] spi_clk -spi_csn0 +spi_csn\[3\] +spi_csn\[2\] +spi_csn\[1\] +spi_csn\[0\] spi_oen\[3\] spi_oen\[2\] spi_oen\[1\]
diff --git a/signoff/pinmux/final_summary_report.csv b/signoff/pinmux/final_summary_report.csv index b79a2ba..ed3dcac 100644 --- a/signoff/pinmux/final_summary_report.csv +++ b/signoff/pinmux/final_summary_report.csv
@@ -1,2 +1,2 @@ ,design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,suggested_clock_frequency,suggested_clock_period,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GLB_RT_ADJUSTMENT,STD_CELL_LIBRARY,CELL_PAD,DIODE_INSERTION_STRATEGY -0,/project/openlane/pinmux,pinmux,pinmux,flow_completed,0h12m14s,-1,46109.09090909091,0.2475,23054.545454545456,27.06,705.51,5706,0,0,0,0,0,0,-1,1,0,-1,-1,428849,61419,0.0,0.0,-1,0.0,-1,0.0,0.0,-1,0.0,-1,317651391.0,7.2,43.17,33.58,11.33,0.37,-1,3574,8561,543,5529,0,0,0,4202,0,0,0,0,0,0,0,4,1343,1339,16,314,3259,0,3573,90.9090909090909,11,10,AREA 0,4,50,1,100,100,0.3,0.0,sky130_fd_sc_hd,4,4 +0,/project/openlane/pinmux,pinmux,pinmux,flow_completed,0h14m33s,-1,46109.09090909091,0.2475,23054.545454545456,27.06,725.12,5706,0,0,0,0,0,0,-1,1,0,-1,-1,429328,61246,0.0,0.0,-1,0.0,-1,0.0,0.0,-1,0.0,-1,317766216.0,6.39,43.04,33.51,11.97,0.39,-1,3574,8561,543,5529,0,0,0,4202,0,0,0,0,0,0,0,4,1343,1339,16,314,3259,0,3573,90.9090909090909,11,10,AREA 0,4,50,1,100,100,0.3,0.0,sky130_fd_sc_hd,4,4
diff --git a/signoff/qspim/final_summary_report.csv b/signoff/qspim/final_summary_report.csv index d9f5ae6..48489c6 100644 --- a/signoff/qspim/final_summary_report.csv +++ b/signoff/qspim/final_summary_report.csv
@@ -1,2 +1,2 @@ ,design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,suggested_clock_frequency,suggested_clock_period,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GLB_RT_ADJUSTMENT,STD_CELL_LIBRARY,CELL_PAD,DIODE_INSERTION_STRATEGY -0,/project/openlane/qspim,qspim_top,qspim,flow_completed,0h7m58s,-1,64718.181818181816,0.22,32359.090909090908,37.6,697.2,7119,0,0,0,0,0,0,-1,1,0,-1,-1,302344,62936,0.0,-4.31,-1,0.0,-1,0.0,-1696.2,-1,0.0,-1,205083381.0,6.96,34.06,32.84,0.5,1.23,-1,6040,8992,699,3650,0,0,0,6886,0,0,0,0,0,0,0,4,1764,2182,20,388,2940,0,3328,90.9090909090909,11,10,AREA 0,4,50,1,100,100,0.4,0.0,sky130_fd_sc_hd,4,4 +0,/project/openlane/qspim,qspim_top,qspim,flow_completed,0h12m38s,-1,69827.27272727272,0.22,34913.63636363636,40.98,754.58,7681,0,0,0,0,0,0,-1,1,0,-1,-1,362731,71425,0.0,-4.04,-1,0.0,-1,0.0,-2134.37,-1,0.0,-1,233420632.0,13.69,38.63,39.31,3.37,1.13,-1,6480,9736,734,3989,0,0,0,7426,0,0,0,0,0,0,0,4,1895,2312,21,388,2940,0,3328,90.9090909090909,11,10,AREA 0,4,50,1,100,100,0.42,0.0,sky130_fd_sc_hd,4,4
diff --git a/signoff/user_project_wrapper/final_summary_report.csv b/signoff/user_project_wrapper/final_summary_report.csv index 63019bd..221a94b 100644 --- a/signoff/user_project_wrapper/final_summary_report.csv +++ b/signoff/user_project_wrapper/final_summary_report.csv
@@ -1,2 +1,2 @@ ,design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,suggested_clock_frequency,suggested_clock_period,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GLB_RT_ADJUSTMENT,STD_CELL_LIBRARY,CELL_PAD,DIODE_INSERTION_STRATEGY -0,/project/openlane/user_project_wrapper,user_project_wrapper,user_project_wrapper,flow_completed,0h39m39s,-1,2.529576587795766,10.2784,1.264788293897883,-1,530.03,13,0,0,0,0,0,0,-1,0,0,-1,-1,1176087,8118,0.0,-1,-1,0.0,-1,0.0,-1,-1,0.0,-1,-1,40144.36,3.16,3.64,0.41,0.63,-1,271,2532,271,2532,0,0,0,13,0,0,0,0,0,0,0,0,-1,-1,-1,0,0,0,0,90.9090909090909,11,10,AREA 0,5,50,1,180,90,0.55,0.0,sky130_fd_sc_hd,4,0 +0,/project/openlane/user_project_wrapper,user_project_wrapper,user_project_wrapper,flow_completed,0h40m57s,-1,2.529576587795766,10.2784,1.264788293897883,-1,530.45,13,0,0,0,0,0,0,-1,0,0,-1,-1,1176117,8176,0.0,-1,-1,0.0,-1,0.0,-1,-1,0.0,-1,-1,40144.36,3.16,3.65,0.41,0.63,-1,272,2536,272,2536,0,0,0,13,0,0,0,0,0,0,0,0,-1,-1,-1,0,0,0,0,90.9090909090909,11,10,AREA 0,5,50,1,180,90,0.55,0.0,sky130_fd_sc_hd,4,0
diff --git a/verilog/dv/user_basic/user_basic_tb.v b/verilog/dv/user_basic/user_basic_tb.v index 918149f..47fe0bc 100644 --- a/verilog/dv/user_basic/user_basic_tb.v +++ b/verilog/dv/user_basic/user_basic_tb.v
@@ -242,8 +242,8 @@ wb_user_core_write('h3080_0000,'h1); wb_user_core_read_check(32'h30020058,read_data,32'h8273_8343); - wb_user_core_read_check(32'h3002005C,read_data,32'h1401_2022); - wb_user_core_read_check(32'h30020060,read_data,32'h0003_0000); + wb_user_core_read_check(32'h3002005C,read_data,32'h1501_2022); + wb_user_core_read_check(32'h30020060,read_data,32'h0003_1000); end
diff --git a/verilog/dv/user_spi/user_spi_tb.v b/verilog/dv/user_spi/user_spi_tb.v index 05d1bdd..137fc2a 100644 --- a/verilog/dv/user_spi/user_spi_tb.v +++ b/verilog/dv/user_spi/user_spi_tb.v
@@ -83,6 +83,21 @@ `include "uprj_netlists.v" `include "mt48lc8m8a2.v" + // REGISTER MAP + `define QSPIM_GLBL_CTRL 32'h10000000 + `define QSPIM_DMEM_CTRL1 32'h10000004 + `define QSPIM_DMEM_CTRL2 32'h10000008 + + `define QSPIM_DMEM_CS_AMAP 32'h1000000C + `define QSPIM_DMEM_CA_AMASK 32'h10000010 + + `define QSPIM_IMEM_CTRL1 32'h10000014 + `define QSPIM_IMEM_CTRL2 32'h10000018 + `define QSPIM_IMEM_ADDR 32'h1000001C + `define QSPIM_IMEM_WDATA 32'h10000020 + `define QSPIM_IMEM_RDATA 32'h10000024 + `define QSPIM_SPI_STATUS 32'h10000028 + module user_spi_tb; reg clock; reg wb_rst_i; @@ -153,10 +168,20 @@ parameter P_FSM_CAW = 4'b0111; // Command -> Address ->Write Data parameter P_FSM_CADW = 4'b1000; // Command -> Address -> DUMMY + Write Data +parameter P_FSM_CAMW = 4'b1001; // Command -> Address -> MODE + Write Data -parameter P_FSM_CDR = 4'b1001; // COMMAND -> DUMMY -> READ -parameter P_FSM_CDW = 4'b1010; // COMMAND -> DUMMY -> WRITE -parameter P_FSM_CR = 4'b1011; // COMMAND -> READ +parameter P_FSM_CDR = 4'b1010; // COMMAND -> DUMMY -> READ +parameter P_FSM_CDW = 4'b1011; // COMMAND -> DUMMY -> WRITE +parameter P_FSM_CR = 4'b1100; // COMMAND -> READ + +parameter P_MODE_SWITCH_IDLE = 2'b00; +parameter P_MODE_SWITCH_AT_ADDR = 2'b01; +parameter P_MODE_SWITCH_AT_DATA = 2'b10; + +parameter P_SINGLE = 2'b00; +parameter P_DOUBLE = 2'b01; +parameter P_QUAD = 2'b10; +parameter P_QDDR = 2'b11; // External clock is used by default. Make this artificially fast for the // simulation. Normally this would be a slow clock and the digital PLL @@ -203,10 +228,10 @@ $display("#############################################"); $display(" Read Identification (RDID:0x9F) "); $display("#############################################"); - wb_user_core_write('h3080_0004,'h10); // Change the Bank Sel 10 - wb_user_core_write(32'h1000000C,{15'h0,1'b0,2'b00,2'b00,4'b0001}); - wb_user_core_write(32'h10000010,{8'h4,2'b00,2'b00,4'b1011,8'h00,8'h9F}); - wb_user_core_read_check(32'h1000001C,read_data,32'h00190201); + wb_user_core_write('h3080_0004,'h10); // Change the Bank Sel 10 + wb_user_core_write(`QSPIM_IMEM_CTRL1,{16'h0,1'b0,1'b0,4'b0000,2'b00,P_SINGLE,P_SINGLE,4'b0001}); + wb_user_core_write(`QSPIM_IMEM_CTRL2,{8'h4,2'b00,2'b00,P_FSM_CR,8'h00,8'h9F}); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00190201); $display("#############################################"); $display("Testing Direct SPI Memory Read "); $display(" SPI Mode: QDDR (Dual 4 bit) "); @@ -215,8 +240,8 @@ $display("#############################################"); // QDDR Config wb_user_core_write('h3080_0004,'h10); // Change the Bank Sel 10 - wb_user_core_write(32'h10000004,{24'h0,2'b01,2'b11,4'b0001}); - wb_user_core_write(32'h10000008,{8'h04,2'b01,2'b10,4'h6,8'h00,8'hED}); + wb_user_core_write(`QSPIM_DMEM_CTRL1,{16'h0,1'b0,1'b0,4'b0100,P_MODE_SWITCH_AT_ADDR,P_QDDR,P_SINGLE,4'b0001}); + wb_user_core_write(`QSPIM_DMEM_CTRL2,{8'h04,2'b00,2'b10,P_FSM_CAMDR,8'h00,8'hED}); wb_user_core_write('h3080_0004,'h00); // Change the Bank Sel 00 wb_user_core_read_check(32'h00000200,read_data,32'h00000093); wb_user_core_read_check(32'h00000204,read_data,32'h00000113); @@ -241,8 +266,8 @@ $display("SEQ: Command -> Address -> Read Data "); $display("#############################################"); wb_user_core_write('h3080_0004,'h10); // Change the Bank Sel 10 - wb_user_core_write(32'h10000004,{24'h0,2'b00,2'b00,4'b0001}); - wb_user_core_write(32'h10000008,{8'h04,2'b00,2'b10,4'h3,8'h00,8'h03}); + wb_user_core_write(`QSPIM_DMEM_CTRL1,{16'h0,1'b0,1'b0,4'b0000,P_MODE_SWITCH_IDLE,P_SINGLE,P_SINGLE,4'b0001}); + wb_user_core_write(`QSPIM_DMEM_CTRL2,{8'h04,2'b00,2'b10,P_FSM_CAR,8'h00,8'h03}); wb_user_core_write('h3080_0004,'h00); // Change the Bank Sel 00 wb_user_core_read_check(32'h00000200,read_data,32'h00000093); wb_user_core_read_check(32'h00000204,read_data,32'h00000113); @@ -267,8 +292,8 @@ $display("SEQ: Command -> Address -> Dummy -> Read Data"); $display("#############################################"); wb_user_core_write('h3080_0004,'h10); // Change the Bank Sel 10 - wb_user_core_write(32'h10000004,{24'h0,2'b00,2'b00,4'b0001}); - wb_user_core_write(32'h10000008,{8'h04,2'b00,2'b10,4'h4,8'h00,8'h0B}); + wb_user_core_write(`QSPIM_DMEM_CTRL1,{16'h0,1'b0,1'b0,4'b0000,P_MODE_SWITCH_IDLE,P_SINGLE,P_SINGLE,4'b0001}); + wb_user_core_write(`QSPIM_DMEM_CTRL2,{8'h04,2'b00,2'b10,P_FSM_CADR,8'h00,8'h0B}); wb_user_core_write('h3080_0004,'h00); // Change the Bank Sel 00 wb_user_core_read_check(32'h00000200,read_data,32'h00000093); wb_user_core_read_check(32'h00000204,read_data,32'h00000113); @@ -294,8 +319,8 @@ $display("SEQ: Command -> Address -> Dummy -> Read Data"); $display("#############################################"); wb_user_core_write('h3080_0004,'h10); // Change the Bank Sel 10 - wb_user_core_write(32'h10000004,{24'h0,2'b10,2'b01,4'b0001}); - wb_user_core_write(32'h10000008,{8'h04,2'b00,2'b10,4'h4,8'h00,8'h3B}); + wb_user_core_write(`QSPIM_DMEM_CTRL1,{16'h0,1'b0,1'b0,4'b0000,P_MODE_SWITCH_AT_DATA,P_DOUBLE,P_SINGLE,4'b0001}); + wb_user_core_write(`QSPIM_DMEM_CTRL2,{8'h04,2'b00,2'b10,P_FSM_CADR,8'h00,8'h3B}); wb_user_core_write('h3080_0004,'h00); // Change the Bank Sel 00 wb_user_core_read_check(32'h00000200,read_data,32'h00000093); wb_user_core_read_check(32'h00000204,read_data,32'h00000113); @@ -321,8 +346,8 @@ $display("SEQ: Command -> Address -> Dummy -> Read Data"); $display("#############################################"); wb_user_core_write('h3080_0004,'h10); // Change the Bank Sel 10 - wb_user_core_write(32'h10000004,{24'h0,2'b01,2'b10,4'b0001}); - wb_user_core_write(32'h10000008,{8'h20,2'b01,2'b10,4'h6,8'h00,8'hEB}); + wb_user_core_write(`QSPIM_DMEM_CTRL1,{16'h0,1'b0,1'b0,4'b0001,P_MODE_SWITCH_AT_ADDR,P_QUAD,P_SINGLE,4'b0001}); + wb_user_core_write(`QSPIM_DMEM_CTRL2,{8'h20,2'b00,2'b10,P_FSM_CAMDR,8'h00,8'hEB}); wb_user_core_write('h3080_0004,'h00); // Change the Bank Sel 00 wb_user_core_read_check(32'h00000200,read_data,32'h00000093); wb_user_core_read_check(32'h00000204,read_data,32'h00000113); @@ -345,8 +370,8 @@ $display("Testing Direct SPI Memory Read with Prefetch:3DW"); $display("#############################################"); wb_user_core_write('h3080_0004,'h10); // Change the Bank Sel 10 - wb_user_core_write(32'h10000004,{24'h0,2'b01,2'b10,4'b0001}); - wb_user_core_write(32'h10000008,{8'hC,2'b01,2'b10,4'h6,8'h00,8'hEB}); + wb_user_core_write(`QSPIM_DMEM_CTRL1,{16'h0,1'b0,1'b0,4'b0001,P_MODE_SWITCH_AT_ADDR,P_QUAD,P_SINGLE,4'b0001}); + wb_user_core_write(`QSPIM_DMEM_CTRL2,{8'hC,2'b00,2'b10,P_FSM_CAMDR,8'h00,8'hEB}); wb_user_core_write('h3080_0004,'h00); // Change the Bank Sel 00 wb_user_core_read_check(32'h00000200,read_data,32'h00000093); wb_user_core_read_check(32'h00000204,read_data,32'h00000113); @@ -369,8 +394,8 @@ $display("Testing Direct SPI Memory Read with Prefetch:2DW"); $display("#############################################"); wb_user_core_write('h3080_0004,'h10); // Change the Bank Sel 10 - wb_user_core_write(32'h10000004,{24'h0,2'b01,2'b10,4'b0001}); - wb_user_core_write(32'h10000008,{8'h8,2'b01,2'b10,4'h6,8'h00,8'hEB}); + wb_user_core_write(`QSPIM_DMEM_CTRL1,{16'h0,1'b0,1'b0,4'b0001,P_MODE_SWITCH_AT_ADDR,P_QUAD,P_SINGLE,4'b0001}); + wb_user_core_write(`QSPIM_DMEM_CTRL2,{8'h8,2'b00,2'b10,P_FSM_CAMDR,8'h00,8'hEB}); wb_user_core_write('h3080_0004,'h00); // Change the Bank Sel 00 wb_user_core_read_check(32'h00000200,read_data,32'h00000093); wb_user_core_read_check(32'h00000204,read_data,32'h00000113); @@ -394,8 +419,8 @@ $display("Testing Direct SPI Memory Read with Prefetch:1DW"); $display("#############################################"); wb_user_core_write('h3080_0004,'h10); // Change the Bank Sel 10 - wb_user_core_write(32'h10000004,{24'h0,2'b01,2'b10,4'b0001}); - wb_user_core_write(32'h10000008,{8'h4,2'b01,2'b10,4'h6,8'h00,8'hEB}); + wb_user_core_write(`QSPIM_DMEM_CTRL1,{16'h0,1'b0,1'b0,4'b0001,P_MODE_SWITCH_AT_ADDR,P_QUAD,P_SINGLE,4'b0001}); + wb_user_core_write(`QSPIM_DMEM_CTRL2,{8'h4,2'b00,2'b10,P_FSM_CAMDR,8'h00,8'hEB}); wb_user_core_write('h3080_0004,'h00); // Change the Bank Sel 00 wb_user_core_read_check(32'h00000200,read_data,32'h00000093); wb_user_core_read_check(32'h00000204,read_data,32'h00000113); @@ -418,8 +443,8 @@ $display("Testing Direct SPI Memory Read with Prefetch:7DW"); $display("#############################################"); wb_user_core_write('h3080_0004,'h10); // Change the Bank Sel 10 - wb_user_core_write(32'h10000004,{24'h0,2'b01,2'b10,4'b0001}); - wb_user_core_write(32'h10000008,{8'h1C,2'b01,2'b10,4'h6,8'h00,8'hEB}); + wb_user_core_write(`QSPIM_DMEM_CTRL1,{16'h0,1'b0,1'b0,4'b0001,P_MODE_SWITCH_AT_ADDR,P_QUAD,P_SINGLE,4'b0001}); + wb_user_core_write(`QSPIM_DMEM_CTRL2,{8'h1C,2'b00,2'b10,P_FSM_CAMDR,8'h00,8'hEB}); wb_user_core_write('h3080_0004,'h00); // Change the Bank Sel 00 wb_user_core_read_check(32'h00000200,read_data,32'h00000093); wb_user_core_read_check(32'h00000204,read_data,32'h00000113); @@ -442,185 +467,185 @@ $display(" Testing Single Word Indirect SPI Memory Read"); $display("#############################################"); wb_user_core_write('h3080_0004,'h10); // Change the Bank Sel 10 - wb_user_core_write(32'h1000000C,{15'h0,1'b0,2'b01,2'b10,4'b0001}); - wb_user_core_write(32'h10000010,{8'h4,2'b01,2'b10,4'b0110,8'h00,8'hEB}); - wb_user_core_write(32'h10000014,32'h00000200); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000093); - wb_user_core_write(32'h10000014,32'h00000204); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000113); - wb_user_core_write(32'h10000014,32'h00000208); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000193); - wb_user_core_write(32'h10000014,32'h0000020C); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000213); - wb_user_core_write(32'h10000014,32'h00000210); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000293); - wb_user_core_write(32'h10000014,32'h00000214); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000313); - wb_user_core_write(32'h10000014,32'h00000218); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000393); - wb_user_core_write(32'h10000014,32'h0000021C); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000413); - wb_user_core_write(32'h10000014,32'h00000300); - wb_user_core_read_check(32'h1000001C,read_data,32'h0005A023); - wb_user_core_write(32'h10000014,32'h00000304); - wb_user_core_read_check(32'h1000001C,read_data,32'h9DE30591); - wb_user_core_write(32'h10000014,32'h00000308); - wb_user_core_read_check(32'h1000001C,read_data,32'h02B7FEE5); - wb_user_core_write(32'h10000014,32'h0000030C); - wb_user_core_read_check(32'h1000001C,read_data,32'h43050049); - wb_user_core_write(32'h10000014,32'h00000310); - wb_user_core_read_check(32'h1000001C,read_data,32'h0062A023); - wb_user_core_write(32'h10000014,32'h00000314); - wb_user_core_read_check(32'h1000001C,read_data,32'h004902B7); - wb_user_core_write(32'h10000014,32'h00000318); - wb_user_core_read_check(32'h1000001C,read_data,32'h03130291); - wb_user_core_write(32'h10000014,32'h0000031C); - wb_user_core_read_check(32'h1000001C,read_data,32'ha0230630); + wb_user_core_write(`QSPIM_IMEM_CTRL1,{16'h0,1'b0,1'b0,4'b0001,P_MODE_SWITCH_AT_ADDR,P_QUAD,P_SINGLE,4'b0001}); + wb_user_core_write(`QSPIM_IMEM_CTRL2,{8'h4,2'b00,2'b10,P_FSM_CAMDR,8'h00,8'hEB}); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000200); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000093); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000204); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000113); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000208); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000193); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h0000020C); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000213); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000210); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000293); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000214); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000313); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000218); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000393); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h0000021C); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000413); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000300); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h0005A023); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000304); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h9DE30591); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000308); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h02B7FEE5); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h0000030C); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h43050049); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000310); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h0062A023); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000314); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h004902B7); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000318); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h03130291); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h0000031C); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'ha0230630); repeat (100) @(posedge clock); $display("#############################################"); $display(" Testing Two Word Indirect SPI Memory Read"); $display("#############################################"); wb_user_core_write('h3080_0004,'h10); // Change the Bank Sel 10 - wb_user_core_write(32'h1000000C,{15'h0,1'b0,2'b01,2'b10,4'b0001}); - wb_user_core_write(32'h10000010,{8'h8,2'b01,2'b10,4'b0110,8'h00,8'hEB}); - wb_user_core_write(32'h10000014,32'h00000200); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000093); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000113); - wb_user_core_write(32'h10000014,32'h00000208); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000193); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000213); - wb_user_core_write(32'h10000014,32'h00000210); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000293); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000313); - wb_user_core_write(32'h10000014,32'h00000218); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000393); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000413); - wb_user_core_write(32'h10000014,32'h00000300); - wb_user_core_read_check(32'h1000001C,read_data,32'h0005A023); - wb_user_core_read_check(32'h1000001C,read_data,32'h9DE30591); - wb_user_core_write(32'h10000014,32'h00000308); - wb_user_core_read_check(32'h1000001C,read_data,32'h02B7FEE5); - wb_user_core_read_check(32'h1000001C,read_data,32'h43050049); - wb_user_core_write(32'h10000014,32'h00000310); - wb_user_core_read_check(32'h1000001C,read_data,32'h0062A023); - wb_user_core_read_check(32'h1000001C,read_data,32'h004902B7); - wb_user_core_write(32'h10000014,32'h00000318); - wb_user_core_read_check(32'h1000001C,read_data,32'h03130291); - wb_user_core_read_check(32'h1000001C,read_data,32'ha0230630); + wb_user_core_write(`QSPIM_IMEM_CTRL1,{16'h0,1'b0,1'b0,4'b0001,P_MODE_SWITCH_AT_ADDR,P_QUAD,P_SINGLE,4'b0001}); + wb_user_core_write(`QSPIM_IMEM_CTRL2,{8'h8,2'b00,2'b10,P_FSM_CAMDR,8'h00,8'hEB}); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000200); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000093); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000113); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000208); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000193); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000213); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000210); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000293); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000313); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000218); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000393); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000413); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000300); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h0005A023); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h9DE30591); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000308); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h02B7FEE5); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h43050049); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000310); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h0062A023); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h004902B7); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000318); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h03130291); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'ha0230630); repeat (100) @(posedge clock); $display("#############################################"); $display(" Testing Three Word Indirect SPI Memory Read"); $display("#############################################"); wb_user_core_write('h3080_0004,'h10); // Change the Bank Sel 10 - wb_user_core_write(32'h1000000C,{15'h0,1'b0,2'b01,2'b10,4'b0001}); - wb_user_core_write(32'h10000010,{8'hC,2'b01,2'b10,4'b0110,8'h00,8'hEB}); - wb_user_core_write(32'h10000014,32'h00000200); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000093); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000113); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000193); - wb_user_core_write(32'h10000014,32'h0000020C); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000213); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000293); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000313); - wb_user_core_write(32'h10000014,32'h00000300); - wb_user_core_read_check(32'h1000001C,read_data,32'h0005A023); - wb_user_core_read_check(32'h1000001C,read_data,32'h9DE30591); - wb_user_core_read_check(32'h1000001C,read_data,32'h02B7FEE5); - wb_user_core_write(32'h10000014,32'h0000030C); - wb_user_core_read_check(32'h1000001C,read_data,32'h43050049); - wb_user_core_read_check(32'h1000001C,read_data,32'h0062A023); - wb_user_core_read_check(32'h1000001C,read_data,32'h004902B7); + wb_user_core_write(`QSPIM_IMEM_CTRL1,{16'h0,1'b0,1'b0,4'b0001,P_MODE_SWITCH_AT_ADDR,P_QUAD,P_SINGLE,4'b0001}); + wb_user_core_write(`QSPIM_IMEM_CTRL2,{8'hC,2'b00,2'b10,P_FSM_CAMDR,8'h00,8'hEB}); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000200); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000093); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000113); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000193); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h0000020C); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000213); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000293); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000313); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000300); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h0005A023); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h9DE30591); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h02B7FEE5); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h0000030C); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h43050049); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h0062A023); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h004902B7); repeat (100) @(posedge clock); $display("#############################################"); $display(" Testing Four Word Indirect SPI Memory Read"); $display("#############################################"); wb_user_core_write('h3080_0004,'h10); // Change the Bank Sel 10 - wb_user_core_write(32'h1000000C,{15'h0,1'b0,2'b01,2'b10,4'b0001}); - wb_user_core_write(32'h10000010,{8'h10,2'b01,2'b10,4'b0110,8'h00,8'hEB}); - wb_user_core_write(32'h10000014,32'h00000200); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000093); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000113); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000193); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000213); - wb_user_core_write(32'h10000014,32'h00000210); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000293); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000313); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000393); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000413); - wb_user_core_write(32'h10000014,32'h00000300); - wb_user_core_read_check(32'h1000001C,read_data,32'h0005A023); - wb_user_core_read_check(32'h1000001C,read_data,32'h9DE30591); - wb_user_core_read_check(32'h1000001C,read_data,32'h02B7FEE5); - wb_user_core_read_check(32'h1000001C,read_data,32'h43050049); - wb_user_core_write(32'h10000014,32'h00000310); - wb_user_core_read_check(32'h1000001C,read_data,32'h0062A023); - wb_user_core_read_check(32'h1000001C,read_data,32'h004902B7); - wb_user_core_read_check(32'h1000001C,read_data,32'h03130291); - wb_user_core_read_check(32'h1000001C,read_data,32'ha0230630); + wb_user_core_write(`QSPIM_IMEM_CTRL1,{16'h0,1'b0,1'b0,4'b0001,P_MODE_SWITCH_AT_ADDR,P_QUAD,P_SINGLE,4'b0001}); + wb_user_core_write(`QSPIM_IMEM_CTRL2,{8'h10,2'b00,2'b10,P_FSM_CAMDR,8'h00,8'hEB}); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000200); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000093); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000113); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000193); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000213); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000210); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000293); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000313); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000393); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000413); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000300); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h0005A023); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h9DE30591); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h02B7FEE5); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h43050049); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000310); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h0062A023); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h004902B7); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h03130291); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'ha0230630); repeat (100) @(posedge clock); $display("#############################################"); $display(" Testing Five Word Indirect SPI Memory Read"); $display("#############################################"); wb_user_core_write('h3080_0004,'h10); // Change the Bank Sel 10 - wb_user_core_write(32'h1000000C,{15'h0,1'b0,2'b01,2'b10,4'b0001}); - wb_user_core_write(32'h10000010,{8'h14,2'b01,2'b10,4'b0110,8'h00,8'hEB}); - wb_user_core_write(32'h10000014,32'h00000200); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000093); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000113); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000193); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000213); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000293); - wb_user_core_write(32'h10000014,32'h00000300); - wb_user_core_read_check(32'h1000001C,read_data,32'h0005A023); - wb_user_core_read_check(32'h1000001C,read_data,32'h9DE30591); - wb_user_core_read_check(32'h1000001C,read_data,32'h02B7FEE5); - wb_user_core_read_check(32'h1000001C,read_data,32'h43050049); - wb_user_core_read_check(32'h1000001C,read_data,32'h0062A023); + wb_user_core_write(`QSPIM_IMEM_CTRL1,{16'h0,1'b0,1'b0,4'b0001,P_MODE_SWITCH_AT_ADDR,P_QUAD,P_SINGLE,4'b0001}); + wb_user_core_write(`QSPIM_IMEM_CTRL2,{8'h14,2'b00,2'b10,P_FSM_CAMDR,8'h00,8'hEB}); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000200); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000093); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000113); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000193); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000213); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000293); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000300); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h0005A023); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h9DE30591); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h02B7FEE5); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h43050049); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h0062A023); $display("#############################################"); $display(" Testing Eight Word Indirect SPI Memory Read"); $display("#############################################"); wb_user_core_write('h3080_0004,'h10); // Change the Bank Sel 10 - wb_user_core_write(32'h1000000C,{15'h0,1'b0,2'b01,2'b10,4'b0001}); - wb_user_core_write(32'h10000010,{8'h20,2'b01,2'b10,4'b0110,8'h00,8'hEB}); - wb_user_core_write(32'h10000014,32'h00000200); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000093); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000113); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000193); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000213); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000293); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000313); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000393); - wb_user_core_read_check(32'h1000001C,read_data,32'h00000413); - wb_user_core_write(32'h10000014,32'h00000300); - wb_user_core_read_check(32'h1000001C,read_data,32'h0005A023); - wb_user_core_read_check(32'h1000001C,read_data,32'h9DE30591); - wb_user_core_read_check(32'h1000001C,read_data,32'h02B7FEE5); - wb_user_core_read_check(32'h1000001C,read_data,32'h43050049); - wb_user_core_read_check(32'h1000001C,read_data,32'h0062A023); - wb_user_core_read_check(32'h1000001C,read_data,32'h004902B7); - wb_user_core_read_check(32'h1000001C,read_data,32'h03130291); - wb_user_core_read_check(32'h1000001C,read_data,32'ha0230630); + wb_user_core_write(`QSPIM_IMEM_CTRL1,{16'h0,1'b0,1'b0,4'b0001,P_MODE_SWITCH_AT_ADDR,P_QUAD,P_SINGLE,4'b0001}); + wb_user_core_write(`QSPIM_IMEM_CTRL2,{8'h20,2'b00,2'b10,P_FSM_CAMDR,8'h00,8'hEB}); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000200); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000093); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000113); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000193); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000213); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000293); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000313); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000393); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00000413); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000300); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h0005A023); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h9DE30591); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h02B7FEE5); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h43050049); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h0062A023); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h004902B7); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h03130291); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'ha0230630); $display("#############################################"); $display(" Sector Erase Command "); $display("#############################################"); wb_user_core_write('h3080_0004,'h10); // Change the Bank Sel 10 // WEN COMMAND - wb_user_core_write(32'h1000000C,{15'h0,1'b0,2'b00,2'b00,4'b0001}); - wb_user_core_write(32'h10000010,{8'h0,2'b00,2'b00,4'b0000,8'h00,8'h06}); - wb_user_core_write(32'h10000018,32'h0); + wb_user_core_write(`QSPIM_IMEM_CTRL1,{16'h0,1'b0,1'b0,4'b0000,P_MODE_SWITCH_IDLE,P_SINGLE,P_SINGLE,4'b0001}); + wb_user_core_write(`QSPIM_IMEM_CTRL2,{8'h0,2'b00,2'b00,P_FSM_C,8'h00,8'h06}); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h0); // Sector Erase - wb_user_core_write(32'h1000000C,{15'h0,1'b0,2'b00,2'b00,4'b0001}); - wb_user_core_write(32'h10000010,{8'h0,2'b00,2'b10,4'b0010,8'h00,8'hD8}); - wb_user_core_write(32'h10000014,32'h00000000); - wb_user_core_write(32'h10000018,32'h0); + wb_user_core_write(`QSPIM_IMEM_CTRL1,{16'h0,1'b0,1'b0,4'b0000,P_MODE_SWITCH_IDLE,P_SINGLE,P_SINGLE,4'b0001}); + wb_user_core_write(`QSPIM_IMEM_CTRL2,{8'h0,2'b00,2'b10,P_FSM_CA,8'h00,8'hD8}); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000000); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h0); // RDSR - wb_user_core_write(32'h1000000C,{15'h0,1'b0,2'b00,2'b00,4'b0001}); - wb_user_core_write(32'h10000010,{8'h4,2'b00,2'b00,4'b1011,8'h00,8'h05}); + wb_user_core_write(`QSPIM_IMEM_CTRL1,{16'h0,1'b0,1'b0,4'b0000,P_MODE_SWITCH_IDLE,P_SINGLE,P_SINGLE,4'b0001}); + wb_user_core_write(`QSPIM_IMEM_CTRL2,{8'h4,2'b00,2'b00,P_FSM_CR,8'h00,8'h05}); read_data = 32'hFFFF_FFFF; while (read_data[1:0] == 2'b11) begin - wb_user_core_read(32'h1000001C,read_data); + wb_user_core_read(`QSPIM_IMEM_RDATA,read_data); repeat (10) @(posedge clock); end @@ -628,80 +653,80 @@ $display(" Page Write Command Address: 0x00 "); $display("#############################################"); // WEN COMMAND - wb_user_core_write(32'h1000000C,{15'h0,1'b0,2'b00,2'b00,4'b0001}); - wb_user_core_write(32'h10000010,{8'h0,2'b00,2'b00,4'b0000,8'h00,8'h06}); - wb_user_core_write(32'h10000018,32'h0); + wb_user_core_write(`QSPIM_IMEM_CTRL1,{16'h0,1'b0,1'b0,4'b0000,P_MODE_SWITCH_IDLE,P_SINGLE,P_SINGLE,4'b0001}); + wb_user_core_write(`QSPIM_IMEM_CTRL2,{8'h0,2'b00,2'b00,P_FSM_C,8'h00,8'h06}); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h0); // Page Programing - wb_user_core_write(32'h1000000C,{15'h0,1'b0,2'b00,2'b00,4'b0001}); - wb_user_core_write(32'h10000010,{8'hF0,2'b00,2'b10,P_FSM_CAW,8'h00,8'h02}); - wb_user_core_write(32'h10000014,32'h00000000); - wb_user_core_write(32'h10000018,32'h00010000); - wb_user_core_write(32'h10000018,32'h00010001); - wb_user_core_write(32'h10000018,32'h00010002); - wb_user_core_write(32'h10000018,32'h00010003); - wb_user_core_write(32'h10000018,32'h00010004); - wb_user_core_write(32'h10000018,32'h00010005); - wb_user_core_write(32'h10000018,32'h00010006); - wb_user_core_write(32'h10000018,32'h00010007); - wb_user_core_write(32'h10000018,32'h00010008); - wb_user_core_write(32'h10000018,32'h00010009); - wb_user_core_write(32'h10000018,32'h00010010); - wb_user_core_write(32'h10000018,32'h00010011); - wb_user_core_write(32'h10000018,32'h00010012); - wb_user_core_write(32'h10000018,32'h00010013); - wb_user_core_write(32'h10000018,32'h00010014); - wb_user_core_write(32'h10000018,32'h00010015); - wb_user_core_write(32'h10000018,32'h00010016); - wb_user_core_write(32'h10000018,32'h00010017); - wb_user_core_write(32'h10000018,32'h00010018); - wb_user_core_write(32'h10000018,32'h00010019); - wb_user_core_write(32'h10000018,32'h00010020); - wb_user_core_write(32'h10000018,32'h00010021); - wb_user_core_write(32'h10000018,32'h00010022); - wb_user_core_write(32'h10000018,32'h00010023); - wb_user_core_write(32'h10000018,32'h00010024); - wb_user_core_write(32'h10000018,32'h00010025); - wb_user_core_write(32'h10000018,32'h00010026); - wb_user_core_write(32'h10000018,32'h00010027); - wb_user_core_write(32'h10000018,32'h00010028); - wb_user_core_write(32'h10000018,32'h00010029); - wb_user_core_write(32'h10000018,32'h00010030); - wb_user_core_write(32'h10000018,32'h00010031); - wb_user_core_write(32'h10000018,32'h00010032); - wb_user_core_write(32'h10000018,32'h00010033); - wb_user_core_write(32'h10000018,32'h00010034); - wb_user_core_write(32'h10000018,32'h00010035); - wb_user_core_write(32'h10000018,32'h00010036); - wb_user_core_write(32'h10000018,32'h00010037); - wb_user_core_write(32'h10000018,32'h00010038); - wb_user_core_write(32'h10000018,32'h00010039); - wb_user_core_write(32'h10000018,32'h00010040); - wb_user_core_write(32'h10000018,32'h00010041); - wb_user_core_write(32'h10000018,32'h00010042); - wb_user_core_write(32'h10000018,32'h00010043); - wb_user_core_write(32'h10000018,32'h00010044); - wb_user_core_write(32'h10000018,32'h00010045); - wb_user_core_write(32'h10000018,32'h00010046); - wb_user_core_write(32'h10000018,32'h00010047); - wb_user_core_write(32'h10000018,32'h00010048); - wb_user_core_write(32'h10000018,32'h00010049); - wb_user_core_write(32'h10000018,32'h00010050); - wb_user_core_write(32'h10000018,32'h00010051); - wb_user_core_write(32'h10000018,32'h00010052); - wb_user_core_write(32'h10000018,32'h00010053); - wb_user_core_write(32'h10000018,32'h00010054); - wb_user_core_write(32'h10000018,32'h00010055); - wb_user_core_write(32'h10000018,32'h00010056); - wb_user_core_write(32'h10000018,32'h00010057); - wb_user_core_write(32'h10000018,32'h00010058); - wb_user_core_write(32'h10000018,32'h00010059); + wb_user_core_write(`QSPIM_IMEM_CTRL1,{16'h0,1'b0,1'b0,4'b0000,P_MODE_SWITCH_IDLE,P_SINGLE,P_SINGLE,4'b0001}); + wb_user_core_write(`QSPIM_IMEM_CTRL2,{8'hF0,2'b00,2'b10,P_FSM_CAW,8'h00,8'h02}); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000000); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010000); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010001); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010002); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010003); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010004); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010005); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010006); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010007); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010008); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010009); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010010); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010011); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010012); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010013); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010014); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010015); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010016); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010017); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010018); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010019); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010020); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010021); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010022); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010023); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010024); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010025); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010026); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010027); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010028); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010029); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010030); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010031); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010032); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010033); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010034); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010035); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010036); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010037); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010038); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010039); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010040); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010041); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010042); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010043); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010044); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010045); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010046); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010047); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010048); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010049); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010050); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010051); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010052); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010053); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010054); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010055); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010056); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010057); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010058); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00010059); // RDSR - wb_user_core_write(32'h1000000C,{15'h0,1'b0,2'b00,2'b00,4'b0001}); - wb_user_core_write(32'h10000010,{8'h4,2'b00,2'b00,4'b1011,8'h00,8'h05}); + wb_user_core_write(`QSPIM_IMEM_CTRL1,{16'h0,1'b0,1'b0,4'b0000,P_MODE_SWITCH_IDLE,P_SINGLE,P_SINGLE,4'b0001}); + wb_user_core_write(`QSPIM_IMEM_CTRL2,{8'h4,2'b00,2'b00,P_FSM_CR,8'h00,8'h05}); read_data = 32'hFFFF_FFFF; while (read_data[1:0] == 2'b11) begin - wb_user_core_read(32'h1000001C,read_data); + wb_user_core_read(`QSPIM_IMEM_RDATA,read_data); repeat (10) @(posedge clock); end @@ -775,70 +800,70 @@ $display(" Page Read through Indirect Access "); $display("#############################################"); wb_user_core_write('h3080_0004,'h10); // Change the Bank Sel 10 - wb_user_core_write(32'h1000000C,{15'h0,1'b0,2'b01,2'b10,4'b0001}); - wb_user_core_write(32'h10000010,{8'hF0,2'b01,2'b10,4'b0110,8'h00,8'hEB}); - wb_user_core_write(32'h10000014,32'h00000000); + wb_user_core_write(`QSPIM_IMEM_CTRL1,{16'h0,1'b0,1'b0,4'b0001,P_MODE_SWITCH_AT_ADDR,P_QUAD,P_SINGLE,4'b0001}); + wb_user_core_write(`QSPIM_IMEM_CTRL2,{8'hF0,2'b00,2'b10,P_FSM_CAMDR,8'h00,8'hEB}); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000000); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010000); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010001); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010002); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010003); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010004); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010005); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010006); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010007); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010008); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010009); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010010); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010011); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010012); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010013); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010014); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010015); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010016); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010017); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010018); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010019); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010020); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010021); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010022); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010023); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010024); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010025); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010026); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010027); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010028); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010029); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010030); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010031); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010032); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010033); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010034); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010035); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010036); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010037); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010038); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010039); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010040); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010041); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010042); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010043); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010044); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010045); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010046); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010047); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010048); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010049); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010050); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010051); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010052); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010053); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010054); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010055); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010056); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010057); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010058); - wb_user_core_read_check(32'h1000001C,read_data,32'h00010059); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010000); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010001); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010002); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010003); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010004); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010005); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010006); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010007); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010008); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010009); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010010); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010011); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010012); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010013); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010014); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010015); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010016); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010017); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010018); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010019); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010020); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010021); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010022); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010023); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010024); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010025); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010026); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010027); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010028); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010029); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010030); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010031); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010032); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010033); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010034); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010035); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010036); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010037); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010038); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010039); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010040); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010041); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010042); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010043); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010044); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010045); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010046); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010047); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010048); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010049); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010050); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010051); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010052); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010053); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010054); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010055); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010056); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010057); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010058); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00010059); repeat (100) @(posedge clock); $display("#############################################"); @@ -846,80 +871,80 @@ $display("#############################################"); wb_user_core_write('h3080_0004,'h10); // Change the Bank Sel 10 // WEN COMMAND - wb_user_core_write(32'h1000000C,{15'h0,1'b0,2'b00,2'b00,4'b0001}); - wb_user_core_write(32'h10000010,{8'h0,2'b00,2'b00,4'b0000,8'h00,8'h06}); - wb_user_core_write(32'h10000018,32'h0); + wb_user_core_write(`QSPIM_IMEM_CTRL1,{16'h0,1'b0,1'b0,4'b0000,P_MODE_SWITCH_IDLE,P_SINGLE,P_SINGLE,4'b0001}); + wb_user_core_write(`QSPIM_IMEM_CTRL2,{8'h0,2'b00,2'b00,P_FSM_C,8'h00,8'h06}); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h0); // Page Programing - wb_user_core_write(32'h1000000C,{15'h0,1'b0,2'b00,2'b00,4'b0001}); - wb_user_core_write(32'h10000010,{8'hF0,2'b00,2'b10,P_FSM_CAW,8'h00,8'h02}); - wb_user_core_write(32'h10000014,32'h00000200); - wb_user_core_write(32'h10000018,32'h00020000); - wb_user_core_write(32'h10000018,32'h00020001); - wb_user_core_write(32'h10000018,32'h00020002); - wb_user_core_write(32'h10000018,32'h00020003); - wb_user_core_write(32'h10000018,32'h00020004); - wb_user_core_write(32'h10000018,32'h00020005); - wb_user_core_write(32'h10000018,32'h00020006); - wb_user_core_write(32'h10000018,32'h00020007); - wb_user_core_write(32'h10000018,32'h00020008); - wb_user_core_write(32'h10000018,32'h00020009); - wb_user_core_write(32'h10000018,32'h00020010); - wb_user_core_write(32'h10000018,32'h00020011); - wb_user_core_write(32'h10000018,32'h00020012); - wb_user_core_write(32'h10000018,32'h00020013); - wb_user_core_write(32'h10000018,32'h00020014); - wb_user_core_write(32'h10000018,32'h00020015); - wb_user_core_write(32'h10000018,32'h00020016); - wb_user_core_write(32'h10000018,32'h00020017); - wb_user_core_write(32'h10000018,32'h00020018); - wb_user_core_write(32'h10000018,32'h00020019); - wb_user_core_write(32'h10000018,32'h00020020); - wb_user_core_write(32'h10000018,32'h00020021); - wb_user_core_write(32'h10000018,32'h00020022); - wb_user_core_write(32'h10000018,32'h00020023); - wb_user_core_write(32'h10000018,32'h00020024); - wb_user_core_write(32'h10000018,32'h00020025); - wb_user_core_write(32'h10000018,32'h00020026); - wb_user_core_write(32'h10000018,32'h00020027); - wb_user_core_write(32'h10000018,32'h00020028); - wb_user_core_write(32'h10000018,32'h00020029); - wb_user_core_write(32'h10000018,32'h00020030); - wb_user_core_write(32'h10000018,32'h00020031); - wb_user_core_write(32'h10000018,32'h00020032); - wb_user_core_write(32'h10000018,32'h00020033); - wb_user_core_write(32'h10000018,32'h00020034); - wb_user_core_write(32'h10000018,32'h00020035); - wb_user_core_write(32'h10000018,32'h00020036); - wb_user_core_write(32'h10000018,32'h00020037); - wb_user_core_write(32'h10000018,32'h00020038); - wb_user_core_write(32'h10000018,32'h00020039); - wb_user_core_write(32'h10000018,32'h00020040); - wb_user_core_write(32'h10000018,32'h00020041); - wb_user_core_write(32'h10000018,32'h00020042); - wb_user_core_write(32'h10000018,32'h00020043); - wb_user_core_write(32'h10000018,32'h00020044); - wb_user_core_write(32'h10000018,32'h00020045); - wb_user_core_write(32'h10000018,32'h00020046); - wb_user_core_write(32'h10000018,32'h00020047); - wb_user_core_write(32'h10000018,32'h00020048); - wb_user_core_write(32'h10000018,32'h00020049); - wb_user_core_write(32'h10000018,32'h00020050); - wb_user_core_write(32'h10000018,32'h00020051); - wb_user_core_write(32'h10000018,32'h00020052); - wb_user_core_write(32'h10000018,32'h00020053); - wb_user_core_write(32'h10000018,32'h00020054); - wb_user_core_write(32'h10000018,32'h00020055); - wb_user_core_write(32'h10000018,32'h00020056); - wb_user_core_write(32'h10000018,32'h00020057); - wb_user_core_write(32'h10000018,32'h00020058); - wb_user_core_write(32'h10000018,32'h00020059); + wb_user_core_write(`QSPIM_IMEM_CTRL1,{16'h0,1'b0,1'b0,4'b0000,P_MODE_SWITCH_IDLE,P_SINGLE,P_SINGLE,4'b0001}); + wb_user_core_write(`QSPIM_IMEM_CTRL2,{8'hF0,2'b00,2'b10,P_FSM_CAW,8'h00,8'h02}); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000200); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020000); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020001); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020002); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020003); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020004); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020005); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020006); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020007); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020008); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020009); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020010); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020011); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020012); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020013); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020014); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020015); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020016); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020017); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020018); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020019); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020020); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020021); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020022); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020023); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020024); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020025); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020026); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020027); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020028); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020029); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020030); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020031); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020032); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020033); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020034); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020035); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020036); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020037); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020038); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020039); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020040); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020041); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020042); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020043); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020044); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020045); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020046); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020047); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020048); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020049); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020050); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020051); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020052); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020053); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020054); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020055); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020056); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020057); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020058); + wb_user_core_write(`QSPIM_IMEM_WDATA,32'h00020059); // RDSR - wb_user_core_write(32'h1000000C,{15'h0,1'b0,2'b00,2'b00,4'b0001}); - wb_user_core_write(32'h10000010,{8'h4,2'b00,2'b00,4'b1011,8'h00,8'h05}); + wb_user_core_write(`QSPIM_IMEM_CTRL1,{16'h0,1'b0,1'b0,4'b0000,P_MODE_SWITCH_IDLE,P_SINGLE,P_SINGLE,4'b0001}); + wb_user_core_write(`QSPIM_IMEM_CTRL2,{8'h4,2'b00,2'b00,P_FSM_CR,8'h00,8'h05}); read_data = 32'hFFFF_FFFF; while (read_data[1:0] == 2'b11) begin - wb_user_core_read(32'h1000001C,read_data); + wb_user_core_read(`QSPIM_IMEM_RDATA,read_data); repeat (10) @(posedge clock); end @@ -993,70 +1018,70 @@ $display(" Page Read through Indirect Access "); $display("#############################################"); wb_user_core_write('h3080_0004,'h10); // Change the Bank Sel 10 - wb_user_core_write(32'h1000000C,{15'h0,1'b0,2'b01,2'b10,4'b0001}); - wb_user_core_write(32'h10000010,{8'hF0,2'b01,2'b10,4'b0110,8'h00,8'hEB}); - wb_user_core_write(32'h10000014,32'h00000200); + wb_user_core_write(`QSPIM_IMEM_CTRL1,{16'h0,1'b0,1'b0,4'b0001,P_MODE_SWITCH_AT_ADDR,P_QUAD,P_SINGLE,4'b0001}); + wb_user_core_write(`QSPIM_IMEM_CTRL2,{8'hF0,2'b00,2'b10,P_FSM_CAMDR,8'h00,8'hEB}); + wb_user_core_write(`QSPIM_IMEM_ADDR,32'h00000200); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020000); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020001); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020002); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020003); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020004); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020005); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020006); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020007); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020008); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020009); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020010); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020011); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020012); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020013); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020014); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020015); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020016); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020017); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020018); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020019); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020020); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020021); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020022); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020023); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020024); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020025); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020026); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020027); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020028); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020029); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020030); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020031); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020032); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020033); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020034); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020035); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020036); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020037); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020038); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020039); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020040); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020041); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020042); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020043); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020044); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020045); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020046); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020047); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020048); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020049); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020050); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020051); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020052); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020053); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020054); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020055); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020056); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020057); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020058); - wb_user_core_read_check(32'h1000001C,read_data,32'h00020059); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020000); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020001); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020002); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020003); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020004); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020005); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020006); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020007); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020008); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020009); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020010); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020011); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020012); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020013); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020014); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020015); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020016); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020017); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020018); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020019); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020020); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020021); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020022); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020023); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020024); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020025); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020026); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020027); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020028); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020029); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020030); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020031); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020032); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020033); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020034); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020035); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020036); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020037); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020038); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020039); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020040); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020041); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020042); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020043); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020044); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020045); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020046); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020047); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020048); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020049); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020050); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020051); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020052); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020053); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020054); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020055); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020056); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020057); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020058); + wb_user_core_read_check(`QSPIM_IMEM_RDATA,read_data,32'h00020059); repeat (100) @(posedge clock); // $display("+1000 cycles");
diff --git a/verilog/rtl/pinmux/src/pinmux_reg.sv b/verilog/rtl/pinmux/src/pinmux_reg.sv index 549dc68..1eb04e1 100644 --- a/verilog/rtl/pinmux/src/pinmux_reg.sv +++ b/verilog/rtl/pinmux/src/pinmux_reg.sv
@@ -721,7 +721,7 @@ //----------------------------------------- // Software Reg-2, Release date: <DAY><MONTH><YEAR> // ---------------------------------------- -gen_32b_reg #(32'h1401_2022) u_reg_23 ( +gen_32b_reg #(32'h1501_2022) u_reg_23 ( //List of Inputs .reset_n (h_reset_n ), .clk (mclk ), @@ -734,9 +734,9 @@ ); //----------------------------------------- -// Software Reg-3: Poject Revison 3.0 = 0003000 +// Software Reg-3: Poject Revison 3.0 = 0003100 // ---------------------------------------- -gen_32b_reg #(32'h0003_0000) u_reg_24 ( +gen_32b_reg #(32'h0003_1000) u_reg_24 ( //List of Inputs .reset_n (h_reset_n ), .clk (mclk ),
diff --git a/verilog/rtl/qspim b/verilog/rtl/qspim index ec4e119..b9ef372 160000 --- a/verilog/rtl/qspim +++ b/verilog/rtl/qspim
@@ -1 +1 @@ -Subproject commit ec4e1191d82ff56079b913e8db71c61e15d2a517 +Subproject commit b9ef37289d55f9982427331b4621dc531a09d1d1
diff --git a/verilog/rtl/user_project_wrapper.v b/verilog/rtl/user_project_wrapper.v index 7b39611..fb4aea9 100644 --- a/verilog/rtl/user_project_wrapper.v +++ b/verilog/rtl/user_project_wrapper.v
@@ -150,6 +150,8 @@ //// 3.0 Jan 14, 2022, Dinesh A //// //// Moving from riscv core from syntacore/scr1 to //// //// yfive/ycr1 on sankranti 2022 (A Hindu New Year) //// +//// 3.1 Jan 15, 2022, Dinesh A //// +//// Major changes in qspim logic to handle special mode //// ////////////////////////////////////////////////////////////////////// //// //// //// Copyright (C) 2000 Authors and OPENCORES.ORG //// @@ -579,6 +581,7 @@ wire [BIST1_ADDR_WD-1:2] mem2_addr_b; wire [BIST1_ADDR_WD-1:2] mem3_addr_b; +wire [3:0] spi_csn; ///////////////////////////////////////////////////////// // Clock Skew Ctrl @@ -846,7 +849,7 @@ // Pad Interface .spi_sdi (sflash_di ), .spi_clk (sflash_sck ), - .spi_csn0 (sflash_ss ), + .spi_csn (spi_csn ), .spi_sdo (sflash_do ), .spi_oen (sflash_oen ) @@ -1150,7 +1153,7 @@ // SFLASH I/F .sflash_sck (sflash_sck ), - .sflash_ss (sflash_ss ), + .sflash_ss (spi_csn ), .sflash_oen (sflash_oen ), .sflash_do (sflash_do ), .sflash_di (sflash_di ),