blob: cae5b871a563abd14d4ed1c38ce8586bcd2f27a8 [file] [log] [blame]
Project Chip ID is: 463062
Setting Project Chip ID to: 000710d6
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!