| commit | f729e836735dc393083bca1380217ced0ae23a5b | [log] [tgz] |
|---|---|---|
| author | Anton Blanchard <anton@linux.ibm.com> | Wed Jun 08 10:09:23 2022 +1000 |
| committer | Anton Blanchard <anton@ozlabs.org> | Wed Jun 08 10:09:23 2022 +1000 |
| tree | 8e07278b4a7a4a856178e83b0d42c9fa15fcbf76 | |
| parent | cbea1106f28fbf1b9d372c03bac348b8789e8e2b [diff] |
Fix PDN
diff --git a/openlane/user_project_wrapper/config.tcl b/openlane/user_project_wrapper/config.tcl index 6d5581d..92a1539 100755 --- a/openlane/user_project_wrapper/config.tcl +++ b/openlane/user_project_wrapper/config.tcl
@@ -30,6 +30,9 @@ set ::env(DESIGN_NAME) user_project_wrapper #section end +set ::env(FP_PDN_CORE_RING_VOFFSET) 12.45 +set ::env(FP_PDN_CORE_RING_HOFFSET) 12.45 + # User Configurations ## Source Verilog Files