Fix PDN
diff --git a/openlane/user_project_wrapper/config.tcl b/openlane/user_project_wrapper/config.tcl index 6d5581d..92a1539 100755 --- a/openlane/user_project_wrapper/config.tcl +++ b/openlane/user_project_wrapper/config.tcl
@@ -30,6 +30,9 @@ set ::env(DESIGN_NAME) user_project_wrapper #section end +set ::env(FP_PDN_CORE_RING_VOFFSET) 12.45 +set ::env(FP_PDN_CORE_RING_HOFFSET) 12.45 + # User Configurations ## Source Verilog Files