| ############################################################################### |
| # Created by write_sdc |
| # Tue Jun 7 03:41:19 2022 |
| ############################################################################### |
| current_design multiply_add_64x64 |
| ############################################################################### |
| # Timing Constraints |
| ############################################################################### |
| create_clock -name clk -period 10.0000 [get_ports {clk}] |
| set_clock_transition 0.1500 [get_clocks {clk}] |
| set_clock_uncertainty 0.2500 clk |
| set_propagated_clock [get_clocks {clk}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[0]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[10]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[11]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[12]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[13]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[14]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[15]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[16]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[17]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[18]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[19]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[1]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[20]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[21]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[22]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[23]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[24]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[25]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[26]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[27]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[28]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[29]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[2]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[30]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[31]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[32]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[33]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[34]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[35]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[36]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[37]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[38]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[39]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[3]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[40]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[41]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[42]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[43]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[44]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[45]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[46]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[47]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[48]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[49]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[4]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[50]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[51]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[52]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[53]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[54]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[55]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[56]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[57]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[58]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[59]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[5]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[60]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[61]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[62]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[63]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[6]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[7]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[8]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {a[9]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[0]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[10]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[11]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[12]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[13]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[14]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[15]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[16]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[17]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[18]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[19]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[1]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[20]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[21]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[22]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[23]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[24]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[25]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[26]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[27]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[28]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[29]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[2]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[30]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[31]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[32]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[33]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[34]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[35]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[36]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[37]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[38]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[39]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[3]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[40]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[41]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[42]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[43]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[44]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[45]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[46]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[47]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[48]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[49]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[4]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[50]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[51]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[52]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[53]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[54]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[55]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[56]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[57]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[58]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[59]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[5]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[60]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[61]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[62]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[63]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[6]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[7]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[8]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {b[9]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[0]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[100]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[101]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[102]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[103]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[104]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[105]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[106]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[107]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[108]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[109]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[10]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[110]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[111]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[112]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[113]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[114]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[115]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[116]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[117]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[118]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[119]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[11]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[120]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[121]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[122]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[123]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[124]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[125]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[126]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[127]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[12]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[13]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[14]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[15]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[16]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[17]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[18]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[19]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[1]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[20]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[21]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[22]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[23]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[24]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[25]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[26]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[27]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[28]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[29]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[2]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[30]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[31]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[32]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[33]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[34]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[35]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[36]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[37]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[38]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[39]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[3]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[40]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[41]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[42]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[43]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[44]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[45]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[46]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[47]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[48]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[49]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[4]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[50]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[51]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[52]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[53]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[54]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[55]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[56]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[57]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[58]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[59]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[5]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[60]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[61]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[62]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[63]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[64]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[65]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[66]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[67]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[68]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[69]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[6]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[70]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[71]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[72]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[73]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[74]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[75]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[76]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[77]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[78]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[79]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[7]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[80]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[81]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[82]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[83]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[84]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[85]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[86]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[87]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[88]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[89]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[8]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[90]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[91]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[92]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[93]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[94]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[95]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[96]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[97]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[98]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[99]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {c[9]}] |
| set_input_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {rst}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[0]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[100]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[101]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[102]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[103]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[104]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[105]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[106]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[107]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[108]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[109]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[10]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[110]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[111]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[112]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[113]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[114]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[115]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[116]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[117]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[118]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[119]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[11]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[120]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[121]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[122]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[123]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[124]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[125]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[126]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[127]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[12]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[13]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[14]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[15]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[16]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[17]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[18]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[19]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[1]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[20]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[21]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[22]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[23]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[24]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[25]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[26]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[27]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[28]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[29]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[2]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[30]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[31]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[32]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[33]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[34]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[35]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[36]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[37]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[38]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[39]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[3]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[40]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[41]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[42]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[43]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[44]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[45]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[46]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[47]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[48]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[49]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[4]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[50]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[51]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[52]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[53]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[54]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[55]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[56]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[57]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[58]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[59]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[5]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[60]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[61]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[62]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[63]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[64]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[65]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[66]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[67]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[68]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[69]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[6]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[70]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[71]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[72]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[73]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[74]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[75]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[76]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[77]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[78]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[79]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[7]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[80]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[81]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[82]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[83]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[84]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[85]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[86]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[87]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[88]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[89]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[8]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[90]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[91]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[92]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[93]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[94]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[95]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[96]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[97]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[98]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[99]}] |
| set_output_delay 4.0000 -clock [get_clocks {clk}] -add_delay [get_ports {o[9]}] |
| ############################################################################### |
| # Environment |
| ############################################################################### |
| set_load -pin_load 0.0334 [get_ports {o[127]}] |
| set_load -pin_load 0.0334 [get_ports {o[126]}] |
| set_load -pin_load 0.0334 [get_ports {o[125]}] |
| set_load -pin_load 0.0334 [get_ports {o[124]}] |
| set_load -pin_load 0.0334 [get_ports {o[123]}] |
| set_load -pin_load 0.0334 [get_ports {o[122]}] |
| set_load -pin_load 0.0334 [get_ports {o[121]}] |
| set_load -pin_load 0.0334 [get_ports {o[120]}] |
| set_load -pin_load 0.0334 [get_ports {o[119]}] |
| set_load -pin_load 0.0334 [get_ports {o[118]}] |
| set_load -pin_load 0.0334 [get_ports {o[117]}] |
| set_load -pin_load 0.0334 [get_ports {o[116]}] |
| set_load -pin_load 0.0334 [get_ports {o[115]}] |
| set_load -pin_load 0.0334 [get_ports {o[114]}] |
| set_load -pin_load 0.0334 [get_ports {o[113]}] |
| set_load -pin_load 0.0334 [get_ports {o[112]}] |
| set_load -pin_load 0.0334 [get_ports {o[111]}] |
| set_load -pin_load 0.0334 [get_ports {o[110]}] |
| set_load -pin_load 0.0334 [get_ports {o[109]}] |
| set_load -pin_load 0.0334 [get_ports {o[108]}] |
| set_load -pin_load 0.0334 [get_ports {o[107]}] |
| set_load -pin_load 0.0334 [get_ports {o[106]}] |
| set_load -pin_load 0.0334 [get_ports {o[105]}] |
| set_load -pin_load 0.0334 [get_ports {o[104]}] |
| set_load -pin_load 0.0334 [get_ports {o[103]}] |
| set_load -pin_load 0.0334 [get_ports {o[102]}] |
| set_load -pin_load 0.0334 [get_ports {o[101]}] |
| set_load -pin_load 0.0334 [get_ports {o[100]}] |
| set_load -pin_load 0.0334 [get_ports {o[99]}] |
| set_load -pin_load 0.0334 [get_ports {o[98]}] |
| set_load -pin_load 0.0334 [get_ports {o[97]}] |
| set_load -pin_load 0.0334 [get_ports {o[96]}] |
| set_load -pin_load 0.0334 [get_ports {o[95]}] |
| set_load -pin_load 0.0334 [get_ports {o[94]}] |
| set_load -pin_load 0.0334 [get_ports {o[93]}] |
| set_load -pin_load 0.0334 [get_ports {o[92]}] |
| set_load -pin_load 0.0334 [get_ports {o[91]}] |
| set_load -pin_load 0.0334 [get_ports {o[90]}] |
| set_load -pin_load 0.0334 [get_ports {o[89]}] |
| set_load -pin_load 0.0334 [get_ports {o[88]}] |
| set_load -pin_load 0.0334 [get_ports {o[87]}] |
| set_load -pin_load 0.0334 [get_ports {o[86]}] |
| set_load -pin_load 0.0334 [get_ports {o[85]}] |
| set_load -pin_load 0.0334 [get_ports {o[84]}] |
| set_load -pin_load 0.0334 [get_ports {o[83]}] |
| set_load -pin_load 0.0334 [get_ports {o[82]}] |
| set_load -pin_load 0.0334 [get_ports {o[81]}] |
| set_load -pin_load 0.0334 [get_ports {o[80]}] |
| set_load -pin_load 0.0334 [get_ports {o[79]}] |
| set_load -pin_load 0.0334 [get_ports {o[78]}] |
| set_load -pin_load 0.0334 [get_ports {o[77]}] |
| set_load -pin_load 0.0334 [get_ports {o[76]}] |
| set_load -pin_load 0.0334 [get_ports {o[75]}] |
| set_load -pin_load 0.0334 [get_ports {o[74]}] |
| set_load -pin_load 0.0334 [get_ports {o[73]}] |
| set_load -pin_load 0.0334 [get_ports {o[72]}] |
| set_load -pin_load 0.0334 [get_ports {o[71]}] |
| set_load -pin_load 0.0334 [get_ports {o[70]}] |
| set_load -pin_load 0.0334 [get_ports {o[69]}] |
| set_load -pin_load 0.0334 [get_ports {o[68]}] |
| set_load -pin_load 0.0334 [get_ports {o[67]}] |
| set_load -pin_load 0.0334 [get_ports {o[66]}] |
| set_load -pin_load 0.0334 [get_ports {o[65]}] |
| set_load -pin_load 0.0334 [get_ports {o[64]}] |
| set_load -pin_load 0.0334 [get_ports {o[63]}] |
| set_load -pin_load 0.0334 [get_ports {o[62]}] |
| set_load -pin_load 0.0334 [get_ports {o[61]}] |
| set_load -pin_load 0.0334 [get_ports {o[60]}] |
| set_load -pin_load 0.0334 [get_ports {o[59]}] |
| set_load -pin_load 0.0334 [get_ports {o[58]}] |
| set_load -pin_load 0.0334 [get_ports {o[57]}] |
| set_load -pin_load 0.0334 [get_ports {o[56]}] |
| set_load -pin_load 0.0334 [get_ports {o[55]}] |
| set_load -pin_load 0.0334 [get_ports {o[54]}] |
| set_load -pin_load 0.0334 [get_ports {o[53]}] |
| set_load -pin_load 0.0334 [get_ports {o[52]}] |
| set_load -pin_load 0.0334 [get_ports {o[51]}] |
| set_load -pin_load 0.0334 [get_ports {o[50]}] |
| set_load -pin_load 0.0334 [get_ports {o[49]}] |
| set_load -pin_load 0.0334 [get_ports {o[48]}] |
| set_load -pin_load 0.0334 [get_ports {o[47]}] |
| set_load -pin_load 0.0334 [get_ports {o[46]}] |
| set_load -pin_load 0.0334 [get_ports {o[45]}] |
| set_load -pin_load 0.0334 [get_ports {o[44]}] |
| set_load -pin_load 0.0334 [get_ports {o[43]}] |
| set_load -pin_load 0.0334 [get_ports {o[42]}] |
| set_load -pin_load 0.0334 [get_ports {o[41]}] |
| set_load -pin_load 0.0334 [get_ports {o[40]}] |
| set_load -pin_load 0.0334 [get_ports {o[39]}] |
| set_load -pin_load 0.0334 [get_ports {o[38]}] |
| set_load -pin_load 0.0334 [get_ports {o[37]}] |
| set_load -pin_load 0.0334 [get_ports {o[36]}] |
| set_load -pin_load 0.0334 [get_ports {o[35]}] |
| set_load -pin_load 0.0334 [get_ports {o[34]}] |
| set_load -pin_load 0.0334 [get_ports {o[33]}] |
| set_load -pin_load 0.0334 [get_ports {o[32]}] |
| set_load -pin_load 0.0334 [get_ports {o[31]}] |
| set_load -pin_load 0.0334 [get_ports {o[30]}] |
| set_load -pin_load 0.0334 [get_ports {o[29]}] |
| set_load -pin_load 0.0334 [get_ports {o[28]}] |
| set_load -pin_load 0.0334 [get_ports {o[27]}] |
| set_load -pin_load 0.0334 [get_ports {o[26]}] |
| set_load -pin_load 0.0334 [get_ports {o[25]}] |
| set_load -pin_load 0.0334 [get_ports {o[24]}] |
| set_load -pin_load 0.0334 [get_ports {o[23]}] |
| set_load -pin_load 0.0334 [get_ports {o[22]}] |
| set_load -pin_load 0.0334 [get_ports {o[21]}] |
| set_load -pin_load 0.0334 [get_ports {o[20]}] |
| set_load -pin_load 0.0334 [get_ports {o[19]}] |
| set_load -pin_load 0.0334 [get_ports {o[18]}] |
| set_load -pin_load 0.0334 [get_ports {o[17]}] |
| set_load -pin_load 0.0334 [get_ports {o[16]}] |
| set_load -pin_load 0.0334 [get_ports {o[15]}] |
| set_load -pin_load 0.0334 [get_ports {o[14]}] |
| set_load -pin_load 0.0334 [get_ports {o[13]}] |
| set_load -pin_load 0.0334 [get_ports {o[12]}] |
| set_load -pin_load 0.0334 [get_ports {o[11]}] |
| set_load -pin_load 0.0334 [get_ports {o[10]}] |
| set_load -pin_load 0.0334 [get_ports {o[9]}] |
| set_load -pin_load 0.0334 [get_ports {o[8]}] |
| set_load -pin_load 0.0334 [get_ports {o[7]}] |
| set_load -pin_load 0.0334 [get_ports {o[6]}] |
| set_load -pin_load 0.0334 [get_ports {o[5]}] |
| set_load -pin_load 0.0334 [get_ports {o[4]}] |
| set_load -pin_load 0.0334 [get_ports {o[3]}] |
| set_load -pin_load 0.0334 [get_ports {o[2]}] |
| set_load -pin_load 0.0334 [get_ports {o[1]}] |
| set_load -pin_load 0.0334 [get_ports {o[0]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {clk}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {rst}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[63]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[62]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[61]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[60]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[59]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[58]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[57]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[56]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[55]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[54]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[53]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[52]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[51]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[50]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[49]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[48]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[47]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[46]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[45]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[44]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[43]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[42]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[41]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[40]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[39]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[38]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[37]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[36]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[35]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[34]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[33]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[32]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[31]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[30]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[29]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[28]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[27]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[26]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[25]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[24]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[23]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[22]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[21]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[20]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[19]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[18]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[17]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[16]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[15]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[14]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[13]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[12]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[11]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[10]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[9]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[8]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[7]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[6]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[5]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[4]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[3]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[2]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[1]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {a[0]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[63]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[62]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[61]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[60]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[59]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[58]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[57]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[56]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[55]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[54]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[53]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[52]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[51]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[50]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[49]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[48]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[47]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[46]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[45]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[44]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[43]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[42]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[41]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[40]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[39]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[38]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[37]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[36]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[35]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[34]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[33]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[32]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[31]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[30]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[29]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[28]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[27]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[26]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[25]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[24]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[23]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[22]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[21]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[20]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[19]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[18]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[17]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[16]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[15]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[14]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[13]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[12]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[11]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[10]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[9]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[8]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[7]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[6]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[5]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[4]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[3]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[2]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[1]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {b[0]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[127]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[126]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[125]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[124]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[123]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[122]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[121]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[120]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[119]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[118]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[117]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[116]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[115]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[114]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[113]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[112]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[111]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[110]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[109]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[108]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[107]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[106]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[105]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[104]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[103]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[102]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[101]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[100]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[99]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[98]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[97]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[96]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[95]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[94]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[93]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[92]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[91]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[90]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[89]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[88]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[87]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[86]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[85]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[84]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[83]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[82]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[81]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[80]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[79]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[78]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[77]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[76]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[75]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[74]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[73]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[72]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[71]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[70]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[69]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[68]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[67]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[66]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[65]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[64]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[63]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[62]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[61]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[60]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[59]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[58]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[57]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[56]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[55]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[54]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[53]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[52]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[51]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[50]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[49]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[48]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[47]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[46]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[45]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[44]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[43]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[42]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[41]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[40]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[39]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[38]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[37]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[36]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[35]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[34]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[33]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[32]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[31]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[30]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[29]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[28]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[27]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[26]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[25]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[24]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[23]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[22]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[21]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[20]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[19]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[18]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[17]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[16]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[15]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[14]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[13]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[12]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[11]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[10]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[9]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[8]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[7]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[6]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[5]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[4]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[3]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[2]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[1]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {c[0]}] |
| set_timing_derate -early 0.9500 |
| set_timing_derate -late 1.0500 |
| ############################################################################### |
| # Design Rules |
| ############################################################################### |
| set_max_fanout 10.0000 [current_design] |
