blob: d9a5e9c5cfa13918d65c51ce7884dc63b370ce32 [file] [log] [blame]
#-----------------------------------------------------------
# Vivado v2018.3 (64-bit)
# SW Build 2405991 on Thu Dec 6 23:36:41 MST 2018
# IP Build 2404404 on Fri Dec 7 01:43:56 MST 2018
# Start of session at: Sun Mar 20 16:00:09 2022
# Process ID: 223153
# Current directory: /home/egoncu/workspace/secure-memory-uart
# Command line: vivado
# Log file: /home/egoncu/workspace/secure-memory-uart/vivado.log
# Journal file: /home/egoncu/workspace/secure-memory-uart/vivado.jou
#-----------------------------------------------------------
start_gui
create_project project_1 /home/egoncu/workspace/project_1 -part xc7vx485tffg1157-1
file mkdir /home/egoncu/workspace/project_1/project_1.srcs/sources_1/new
close [ open /home/egoncu/workspace/project_1/project_1.srcs/sources_1/new/aes.v w ]
add_files /home/egoncu/workspace/project_1/project_1.srcs/sources_1/new/aes.v
update_compile_order -fileset sources_1
file mkdir /home/egoncu/workspace/project_1/project_1.srcs/sim_1/new
set_property SOURCE_SET sources_1 [get_filesets sim_1]
close [ open /home/egoncu/workspace/project_1/project_1.srcs/sim_1/new/tb.v w ]
add_files -fileset sim_1 /home/egoncu/workspace/project_1/project_1.srcs/sim_1/new/tb.v
update_compile_order -fileset sources_1
update_compile_order -fileset sim_1
update_compile_order -fileset sim_1
launch_simulation
source aes128_tb.tcl
relaunch_sim
update_compile_order -fileset sim_1
launch_simulation
source aes.tcl
run 1 us
relaunch_sim
current_sim simulation_1
close_sim
run all
run all
relaunch_sim
run all
run all
close_sim
launch_simulation
source aes.tcl
relaunch_sim
close_sim
# Disabling source management mode. This is to allow the top design properties to be set without GUI intervention.
set_property source_mgmt_mode None [current_project]
set_property top aes_tb [get_filesets sim_1]
set_property top_lib xil_defaultlib [get_filesets sim_1]
# Re-enabling previously disabled source management mode.
set_property source_mgmt_mode All [current_project]
update_compile_order -fileset sim_1
launch_simulation
source aes_tb.tcl
relaunch_sim
relaunch_sim
relaunch_sim
relaunch_sim
relaunch_sim
relaunch_sim
relaunch_sim
relaunch_sim
relaunch_sim
relaunch_sim
run 1 us
relaunch_sim
run 1 us
close [ open /home/egoncu/workspace/project_1/project_1.srcs/sources_1/new/lfsr.v w ]
add_files /home/egoncu/workspace/project_1/project_1.srcs/sources_1/new/lfsr.v
update_compile_order -fileset sources_1
set_property SOURCE_SET sources_1 [get_filesets sim_1]
close [ open /home/egoncu/workspace/project_1/project_1.srcs/sim_1/new/tb_lfsr.v w ]
add_files -fileset sim_1 /home/egoncu/workspace/project_1/project_1.srcs/sim_1/new/tb_lfsr.v
update_compile_order -fileset sim_1
# Disabling source management mode. This is to allow the top design properties to be set without GUI intervention.
set_property source_mgmt_mode None [current_project]
set_property top LFSR_TB [get_filesets sim_1]
set_property top_lib xil_defaultlib [get_filesets sim_1]
# Re-enabling previously disabled source management mode.
set_property source_mgmt_mode All [current_project]
update_compile_order -fileset sim_1
launch_simulation
launch_simulation
source LFSR_TB.tcl
synth_design -rtl -name rtl_1
# Disabling source management mode. This is to allow the top design properties to be set without GUI intervention.
set_property source_mgmt_mode None [current_project]
set_property top LFSR [current_fileset]
# Re-enabling previously disabled source management mode.
set_property source_mgmt_mode All [current_project]
refresh_design
update_compile_order -fileset sources_1
refresh_design
refresh_design
refresh_design
refresh_design
refresh_design
refresh_design
close_sim
close_sim