Sign in
foss-eda-tools
/
third_party
/
shuttle
/
sky130
/
mpw-005
/
slot-036
/
c8bbbebb7f2e4756c91a6f5fbcd8071567f8f62b
commit
c8bbbebb7f2e4756c91a6f5fbcd8071567f8f62b
[
log
]
[
tgz
]
author
Muhammad Tahir <mtahir@uet.edu.pk>
Mon Mar 21 08:34:00 2022 +0500
committer
Muhammad Tahir <mtahir@uet.edu.pk>
Mon Mar 21 08:34:00 2022 +0500
tree
109ab8b9b5678d84f20c90a9fb27abefbebdca42
parent
2aec2e0fca6ce9b5df80ec569748986a2bffd600
[
diff
]
License info added
verilog/rtl/Core.v
[
diff
]
verilog/rtl/DMem.v
[
diff
]
verilog/rtl/IMem.v
[
diff
]
verilog/rtl/Motor_Top.v
[
diff
]
verilog/rtl/Processor_Tile.v
[
diff
]
verilog/rtl/WB_InterConnect.v
[
diff
]
verilog/rtl/sky130_sram_1kbyte_1rw1r_32x256_8.v
[
diff
]
verilog/rtl/sky130_sram_2kbyte_1rw1r_32x512_8.v
[
diff
]
verilog/rtl/user_project_wrapper.v
[
diff
]
9 files changed
tree: 109ab8b9b5678d84f20c90a9fb27abefbebdca42
.github/
def/
docs/
gds/
lef/
mag/
maglef/
openlane/
sdc/
sdf/
signoff/
spef/
spi/
verilog/
caravel
.gitignore
LICENSE
Makefile
README.md
README.md
UETRV-ecore
Here is the toplevel block diagram of ECORE
