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foss-eda-tools
/
third_party
/
shuttle
/
sky130
/
mpw-005
/
slot-036
/
b28c7c240351d7dd06511b9af60ebe6122babc6e
commit
b28c7c240351d7dd06511b9af60ebe6122babc6e
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tgz
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author
EmJunaid <2018ee71@student.uet.edu.pk>
Mon Mar 21 08:49:26 2022 +0500
committer
EmJunaid <2018ee71@student.uet.edu.pk>
Mon Mar 21 08:49:26 2022 +0500
tree
837ef667c5edff7882d289fcc9c8567adfef5ff6
parent
ab3a3a6bb3e98892b9e50d39c38a1e938effcada
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Licence added
Makefile
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verilog/rtl/Core.v
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verilog/rtl/DMem.v
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diff
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verilog/rtl/IMem.v
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verilog/rtl/Motor_Top.v
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verilog/rtl/Processor_Tile.v
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verilog/rtl/WB_InterConnect.v
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7 files changed
tree: 837ef667c5edff7882d289fcc9c8567adfef5ff6
.github/
def/
docs/
gds/
lef/
mag/
maglef/
openlane/
sdc/
sdf/
signoff/
spef/
spi/
verilog/
caravel
.gitignore
LICENSE
Makefile
README.md
README.md
UETRV-ecore
Here is the toplevel block diagram of ECORE
