| Design Name: WB_InterConnect |
| Run Directory: /home/ali112000/mpw5/UETRV-ECORE/openlane/Wishbone_InterConnect/runs/Wishbone_InterConnect |
| ---------------------------------------- |
| |
| Magic DRC Summary: |
| Source: /home/ali112000/mpw5/UETRV-ECORE/openlane/Wishbone_InterConnect/runs/Wishbone_InterConnect/reports/finishing/drc.rpt |
| Total Magic DRC violations is 0 |
| ---------------------------------------- |
| |
| LVS Summary: |
| Source: /home/ali112000/mpw5/UETRV-ECORE/openlane/Wishbone_InterConnect/runs/Wishbone_InterConnect/logs/finishing/34-WB_InterConnect.lvs.lef.log |
| LVS reports no net, device, pin, or property mismatches. |
| Total errors = 0 |
| ---------------------------------------- |
| |
| Antenna Summary: |
| Source: /home/ali112000/mpw5/UETRV-ECORE/openlane/Wishbone_InterConnect/runs/Wishbone_InterConnect/reports/finishing/antenna.rpt |
| Number of pins violated: 44 |
| Number of nets violated: 42 |
