| OpenROAD 8d53e9b018dec98fa63e907ddeb6c5406f035361 |
| This program is licensed under the BSD-3 license. See the LICENSE file for details. |
| Components of this program may be licensed under more restrictive licenses which must be honored. |
| [INFO ODB-0222] Reading LEF file: /home/ali112000/mpw5/UETRV-ECORE/openlane/Core/runs/Core/tmp/merged_unpadded.lef |
| [INFO ODB-0223] Created 13 technology layers |
| [INFO ODB-0224] Created 25 technology vias |
| [INFO ODB-0225] Created 441 library cells |
| [INFO ODB-0226] Finished LEF file: /home/ali112000/mpw5/UETRV-ECORE/openlane/Core/runs/Core/tmp/merged_unpadded.lef |
| [INFO ODB-0127] Reading DEF file: /home/ali112000/mpw5/UETRV-ECORE/openlane/Core/runs/Core/results/placement/Core.def |
| [INFO ODB-0128] Design: Core |
| [INFO ODB-0130] Created 176 pins. |
| [INFO ODB-0131] Created 14586 components and 88604 component-terminals. |
| [INFO ODB-0132] Created 2 special nets and 51796 connections. |
| [INFO ODB-0133] Created 11033 nets and 36808 connections. |
| [INFO ODB-0134] Finished DEF file: /home/ali112000/mpw5/UETRV-ECORE/openlane/Core/runs/Core/results/placement/Core.def |
| ############################################################################### |
| # Created by write_sdc |
| # Mon Mar 21 23:22:46 2022 |
| ############################################################################### |
| current_design Core |
| ############################################################################### |
| # Timing Constraints |
| ############################################################################### |
| create_clock -name clock -period 20.0000 [get_ports {clock}] |
| set_clock_transition 0.1500 [get_clocks {clock}] |
| set_clock_uncertainty 0.2500 clock |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[0]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[10]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[11]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[12]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[13]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[14]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[15]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[16]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[17]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[18]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[19]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[1]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[20]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[21]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[22]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[23]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[24]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[25]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[26]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[27]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[28]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[29]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[2]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[30]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[31]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[3]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[4]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[5]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[6]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[7]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[8]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rdata[9]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_valid}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[0]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[10]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[11]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[12]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[13]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[14]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[15]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[16]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[17]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[18]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[19]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[1]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[20]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[21]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[22]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[23]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[24]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[25]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[26]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[27]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[28]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[29]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[2]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[30]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[31]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[3]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[4]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[5]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[6]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[7]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[8]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_inst[9]}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_valid}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_irq_motor_irq}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_irq_spi_irq}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_irq_uart_irq}] |
| set_input_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {reset}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[0]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[10]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[11]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[12]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[13]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[14]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[15]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[16]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[17]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[18]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[19]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[1]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[20]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[21]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[22]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[23]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[24]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[25]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[26]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[27]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[28]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[29]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[2]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[30]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[31]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[3]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[4]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[5]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[6]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[7]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[8]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_addr[9]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_ld_type[0]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_ld_type[1]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_ld_type[2]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_rd_en}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_st_type[0]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_st_type[1]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[0]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[10]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[11]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[12]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[13]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[14]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[15]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[16]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[17]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[18]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[19]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[1]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[20]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[21]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[22]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[23]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[24]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[25]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[26]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[27]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[28]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[29]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[2]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[30]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[31]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[3]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[4]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[5]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[6]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[7]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[8]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wdata[9]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_dbus_wr_en}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[0]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[10]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[11]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[12]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[13]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[14]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[15]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[16]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[17]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[18]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[19]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[1]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[20]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[21]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[22]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[23]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[24]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[25]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[26]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[27]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[28]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[29]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[2]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[30]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[31]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[3]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[4]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[5]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[6]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[7]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[8]}] |
| set_output_delay 4.0000 -clock [get_clocks {clock}] -add_delay [get_ports {io_ibus_addr[9]}] |
| ############################################################################### |
| # Environment |
| ############################################################################### |
| set_load -pin_load 0.0334 [get_ports {io_dbus_rd_en}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wr_en}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[31]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[30]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[29]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[28]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[27]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[26]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[25]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[24]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[23]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[22]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[21]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[20]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[19]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[18]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[17]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[16]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[15]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[14]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[13]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[12]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[11]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[10]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[9]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[8]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[7]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[6]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[5]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[4]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[3]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[2]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[1]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_addr[0]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_ld_type[2]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_ld_type[1]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_ld_type[0]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_st_type[1]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_st_type[0]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[31]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[30]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[29]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[28]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[27]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[26]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[25]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[24]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[23]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[22]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[21]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[20]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[19]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[18]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[17]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[16]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[15]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[14]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[13]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[12]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[11]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[10]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[9]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[8]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[7]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[6]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[5]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[4]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[3]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[2]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[1]}] |
| set_load -pin_load 0.0334 [get_ports {io_dbus_wdata[0]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[31]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[30]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[29]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[28]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[27]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[26]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[25]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[24]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[23]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[22]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[21]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[20]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[19]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[18]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[17]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[16]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[15]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[14]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[13]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[12]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[11]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[10]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[9]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[8]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[7]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[6]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[5]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[4]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[3]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[2]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[1]}] |
| set_load -pin_load 0.0334 [get_ports {io_ibus_addr[0]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {clock}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_valid}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_valid}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_irq_motor_irq}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_irq_spi_irq}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_irq_uart_irq}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {reset}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[31]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[30]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[29]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[28]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[27]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[26]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[25]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[24]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[23]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[22]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[21]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[20]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[19]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[18]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[17]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[16]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[15]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[14]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[13]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[12]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[11]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[10]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[9]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[8]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[7]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[6]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[5]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[4]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[3]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[2]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[1]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_dbus_rdata[0]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[31]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[30]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[29]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[28]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[27]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[26]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[25]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[24]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[23]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[22]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[21]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[20]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[19]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[18]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[17]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[16]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[15]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[14]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[13]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[12]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[11]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[10]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[9]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[8]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[7]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[6]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[5]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[4]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[3]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[2]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[1]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {io_ibus_inst[0]}] |
| set_timing_derate -early 0.9500 |
| set_timing_derate -late 1.0500 |
| ############################################################################### |
| # Design Rules |
| ############################################################################### |
| set_max_fanout 5.0000 [current_design] |
| [INFO]: Setting RC values... |
| [INFO]: Configuring cts characterization... |
| [INFO]: Performing clock tree synthesis... |
| [INFO]: Looking for the following net(s): |
| [INFO]: Running Clock Tree Synthesis... |
| [INFO CTS-0038] Number of created patterns = 50000. |
| [INFO CTS-0038] Number of created patterns = 100000. |
| [INFO CTS-0039] Number of created patterns = 137808. |
| [INFO CTS-0084] Compiling LUT. |
| Min. len Max. len Min. cap Max. cap Min. slew Max. slew |
| 2 8 1 36 1 150 |
| [WARNING CTS-0043] 4752 wires are pure wire and no slew degradation. |
| TritonCTS forced slew degradation on these wires. |
| [INFO CTS-0046] Number of wire segments: 136611. |
| [INFO CTS-0047] Number of keys in characterization LUT: 1923. |
| [INFO CTS-0048] Actual min input cap: 1. |
| [INFO CTS-0007] Net "clock" found for clock "clock". |
| [INFO CTS-0010] Clock net "clock" has 1617 sinks. |
| [INFO CTS-0008] TritonCTS found 1 clock nets. |
| [INFO CTS-0097] Characterization used 3 buffer(s) types. |
| [INFO CTS-0027] Generating H-Tree topology for net clock. |
| [INFO CTS-0028] Total number of sinks: 1617. |
| [INFO CTS-0029] Sinks will be clustered in groups of up to 25 and with maximum cluster diameter of 50.0 um. |
| [INFO CTS-0030] Number of static layers: 0. |
| [INFO CTS-0020] Wire segment unit: 13000 dbu (13 um). |
| [INFO CTS-0019] Total number of sinks after clustering: 195. |
| [INFO CTS-0024] Normalized sink region: [(1.12547, 1.77846), (37.5733, 36.7215)]. |
| [INFO CTS-0025] Width: 36.4478. |
| [INFO CTS-0026] Height: 34.9431. |
| Level 1 |
| Direction: Horizontal |
| Sinks per sub-region: 98 |
| Sub-region size: 18.2239 X 34.9431 |
| [INFO CTS-0034] Segment length (rounded): 10. |
| Key: 4068 outSlew: 13 load: 1 length: 8 isBuffered: true |
| Key: 29 outSlew: 7 load: 1 length: 2 isBuffered: true |
| Level 2 |
| Direction: Vertical |
| Sinks per sub-region: 49 |
| Sub-region size: 18.2239 X 17.4715 |
| [INFO CTS-0034] Segment length (rounded): 8. |
| Key: 4073 outSlew: 13 load: 1 length: 8 isBuffered: true |
| Level 3 |
| Direction: Horizontal |
| Sinks per sub-region: 25 |
| Sub-region size: 9.1120 X 17.4715 |
| [INFO CTS-0034] Segment length (rounded): 4. |
| Key: 173 outSlew: 7 load: 1 length: 4 isBuffered: true |
| Level 4 |
| Direction: Vertical |
| Sinks per sub-region: 13 |
| Sub-region size: 9.1120 X 8.7358 |
| [INFO CTS-0034] Segment length (rounded): 4. |
| Key: 167 outSlew: 7 load: 1 length: 4 isBuffered: true |
| [INFO CTS-0032] Stop criterion found. Max number of sinks is 15. |
| [INFO CTS-0035] Number of sinks covered: 195. |
| [INFO CTS-0036] Average source sink dist: 23334.77 dbu. |
| [INFO CTS-0037] Number of outlier sinks: 12. |
| [INFO CTS-0018] Created 238 clock buffers. |
| [INFO CTS-0012] Minimum number of buffers in the clock path: 6. |
| [INFO CTS-0013] Maximum number of buffers in the clock path: 8. |
| [INFO CTS-0015] Created 238 clock nets. |
| [INFO CTS-0016] Fanout distribution for the current clock = 2:5, 3:2, 4:12, 5:13, 6:16, 7:24, 8:35, 9:24, 10:24, 11:16, 12:16, 13:7, 14:7, 15:6, 16:1, 18:1.. |
| [INFO CTS-0017] Max level of the clock tree: 4. |
| [INFO CTS-0098] Clock net "clock" |
| [INFO CTS-0099] Sinks 1617 |
| [INFO CTS-0100] Leaf buffers 193 |
| [INFO CTS-0101] Average sink wire length 760.68 um |
| [INFO CTS-0102] Path depth 6 - 8 |
| [INFO]: Repairing long wires on clock nets... |
| [INFO RSZ-0058] Using max wire length 2319um. |
| [INFO]: Legalizing... |
| Placement Analysis |
| --------------------------------- |
| total displacement 2588.8 u |
| average displacement 0.2 u |
| max displacement 10.6 u |
| original HPWL 436666.5 u |
| legalized HPWL 446451.6 u |
| delta HPWL 2 % |
| |
| [INFO DPL-0020] Mirrored 4302 instances |
| [INFO DPL-0021] HPWL before 446451.6 u |
| [INFO DPL-0022] HPWL after 437768.9 u |
| [INFO DPL-0023] HPWL delta -1.9 % |
| cts_report |
| [INFO CTS-0003] Total number of Clock Roots: 1. |
| [INFO CTS-0004] Total number of Buffers Inserted: 238. |
| [INFO CTS-0005] Total number of Clock Subnets: 238. |
| [INFO CTS-0006] Total number of Sinks: 1617. |
| cts_report_end |
| min_report |
| |
| =========================================================================== |
| report_checks -path_delay min (Hold) |
| ============================================================================ |
| Startpoint: _19137_ (rising edge-triggered flip-flop clocked by clock) |
| Endpoint: _19136_ (rising edge-triggered flip-flop clocked by clock) |
| Path Group: clock |
| Path Type: min |
| |
| Fanout Cap Slew Delay Time Description |
| ----------------------------------------------------------------------------- |
| 0.00 0.00 clock clock (rise edge) |
| 0.00 0.00 clock source latency |
| 0.28 0.19 0.19 ^ clock (in) |
| 1 0.06 clock (net) |
| 0.28 0.00 0.19 ^ clkbuf_0_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.05 0.19 0.38 ^ clkbuf_0_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 2 0.02 clknet_0_clock (net) |
| 0.05 0.00 0.39 ^ clkbuf_1_1_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.05 0.10 0.49 ^ clkbuf_1_1_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 1 0.01 clknet_1_1_0_clock (net) |
| 0.05 0.00 0.49 ^ clkbuf_1_1_1_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.12 0.15 0.64 ^ clkbuf_1_1_1_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_1_1_1_clock (net) |
| 0.12 0.00 0.64 ^ clkbuf_2_2_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.19 0.22 0.86 ^ clkbuf_2_2_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.03 clknet_2_2_0_clock (net) |
| 0.19 0.00 0.86 ^ clkbuf_3_5_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.11 0.19 1.04 ^ clkbuf_3_5_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_3_5_0_clock (net) |
| 0.11 0.00 1.05 ^ clkbuf_4_11_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.72 0.57 1.61 ^ clkbuf_4_11_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 10 0.14 clknet_4_11_0_clock (net) |
| 0.72 0.00 1.61 ^ clkbuf_leaf_142_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.06 0.26 1.87 ^ clkbuf_leaf_142_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 6 0.02 clknet_leaf_142_clock (net) |
| 0.06 0.00 1.87 ^ _19137_/CLK (sky130_fd_sc_hd__dfxtp_1) |
| 0.04 0.29 2.16 ^ _19137_/Q (sky130_fd_sc_hd__dfxtp_1) |
| 1 0.00 dpath.csr.br_taken (net) |
| 0.04 0.00 2.16 ^ _19136_/D (sky130_fd_sc_hd__dfxtp_1) |
| 2.16 data arrival time |
| |
| 0.00 0.00 clock clock (rise edge) |
| 0.00 0.00 clock source latency |
| 0.28 0.21 0.21 ^ clock (in) |
| 1 0.06 clock (net) |
| 0.28 0.00 0.21 ^ clkbuf_0_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.05 0.21 0.43 ^ clkbuf_0_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 2 0.02 clknet_0_clock (net) |
| 0.05 0.00 0.43 ^ clkbuf_1_1_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.05 0.11 0.54 ^ clkbuf_1_1_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 1 0.01 clknet_1_1_0_clock (net) |
| 0.05 0.00 0.54 ^ clkbuf_1_1_1_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.12 0.17 0.70 ^ clkbuf_1_1_1_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_1_1_1_clock (net) |
| 0.12 0.00 0.70 ^ clkbuf_2_2_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.19 0.24 0.95 ^ clkbuf_2_2_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.03 clknet_2_2_0_clock (net) |
| 0.19 0.00 0.95 ^ clkbuf_3_5_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.11 0.21 1.15 ^ clkbuf_3_5_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_3_5_0_clock (net) |
| 0.11 0.00 1.16 ^ clkbuf_4_11_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.72 0.63 1.78 ^ clkbuf_4_11_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 10 0.14 clknet_4_11_0_clock (net) |
| 0.72 0.00 1.78 ^ clkbuf_leaf_141_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.08 0.31 2.09 ^ clkbuf_leaf_141_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 16 0.05 clknet_leaf_141_clock (net) |
| 0.08 0.00 2.10 ^ _19136_/CLK (sky130_fd_sc_hd__dfxtp_1) |
| 0.25 2.35 clock uncertainty |
| -0.17 2.18 clock reconvergence pessimism |
| -0.03 2.15 library hold time |
| 2.15 data required time |
| ----------------------------------------------------------------------------- |
| 2.15 data required time |
| -2.16 data arrival time |
| ----------------------------------------------------------------------------- |
| 0.01 slack (MET) |
| |
| |
| Startpoint: _19851_ (rising edge-triggered flip-flop clocked by clock) |
| Endpoint: _19819_ (rising edge-triggered flip-flop clocked by clock) |
| Path Group: clock |
| Path Type: min |
| |
| Fanout Cap Slew Delay Time Description |
| ----------------------------------------------------------------------------- |
| 0.00 0.00 clock clock (rise edge) |
| 0.00 0.00 clock source latency |
| 0.28 0.19 0.19 ^ clock (in) |
| 1 0.06 clock (net) |
| 0.28 0.00 0.19 ^ clkbuf_0_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.05 0.19 0.38 ^ clkbuf_0_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 2 0.02 clknet_0_clock (net) |
| 0.05 0.00 0.39 ^ clkbuf_1_1_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.05 0.10 0.49 ^ clkbuf_1_1_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 1 0.01 clknet_1_1_0_clock (net) |
| 0.05 0.00 0.49 ^ clkbuf_1_1_1_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.12 0.15 0.64 ^ clkbuf_1_1_1_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_1_1_1_clock (net) |
| 0.12 0.00 0.64 ^ clkbuf_2_2_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.19 0.22 0.86 ^ clkbuf_2_2_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.03 clknet_2_2_0_clock (net) |
| 0.19 0.00 0.86 ^ clkbuf_3_5_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.11 0.19 1.04 ^ clkbuf_3_5_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_3_5_0_clock (net) |
| 0.11 0.00 1.05 ^ clkbuf_4_11_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.72 0.57 1.61 ^ clkbuf_4_11_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 10 0.14 clknet_4_11_0_clock (net) |
| 0.72 0.00 1.62 ^ clkbuf_leaf_121_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.06 0.26 1.88 ^ clkbuf_leaf_121_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 7 0.02 clknet_leaf_121_clock (net) |
| 0.06 0.00 1.88 ^ _19851_/CLK (sky130_fd_sc_hd__dfxtp_1) |
| 0.06 0.31 2.19 v _19851_/Q (sky130_fd_sc_hd__dfxtp_1) |
| 3 0.01 ctrl._T_187[16] (net) |
| 0.06 0.00 2.19 v _09199_/A (sky130_fd_sc_hd__inv_2) |
| 0.09 0.09 2.28 ^ _09199_/Y (sky130_fd_sc_hd__inv_2) |
| 2 0.02 _03642_ (net) |
| 0.09 0.00 2.28 ^ _18109_/A (sky130_fd_sc_hd__nand2_1) |
| 0.06 0.07 2.35 v _18109_/Y (sky130_fd_sc_hd__nand2_1) |
| 1 0.01 _03434_ (net) |
| 0.06 0.00 2.35 v _18111_/B1 (sky130_fd_sc_hd__o211a_1) |
| 0.03 0.12 2.47 v _18111_/X (sky130_fd_sc_hd__o211a_1) |
| 1 0.00 _01576_ (net) |
| 0.03 0.00 2.47 v _19819_/D (sky130_fd_sc_hd__dfxtp_1) |
| 2.47 data arrival time |
| |
| 0.00 0.00 clock clock (rise edge) |
| 0.00 0.00 clock source latency |
| 0.28 0.21 0.21 ^ clock (in) |
| 1 0.06 clock (net) |
| 0.28 0.00 0.21 ^ clkbuf_0_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.05 0.21 0.43 ^ clkbuf_0_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 2 0.02 clknet_0_clock (net) |
| 0.05 0.00 0.43 ^ clkbuf_1_1_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.05 0.11 0.54 ^ clkbuf_1_1_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 1 0.01 clknet_1_1_0_clock (net) |
| 0.05 0.00 0.54 ^ clkbuf_1_1_1_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.12 0.17 0.70 ^ clkbuf_1_1_1_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_1_1_1_clock (net) |
| 0.12 0.00 0.70 ^ clkbuf_2_3_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.18 0.24 0.94 ^ clkbuf_2_3_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.03 clknet_2_3_0_clock (net) |
| 0.18 0.00 0.94 ^ clkbuf_3_7_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.12 0.21 1.16 ^ clkbuf_3_7_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_3_7_0_clock (net) |
| 0.12 0.00 1.16 ^ clkbuf_4_15_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.99 0.82 1.98 ^ clkbuf_4_15_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 14 0.19 clknet_4_15_0_clock (net) |
| 0.99 0.00 1.98 ^ clkbuf_leaf_109_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.07 0.31 2.29 ^ clkbuf_leaf_109_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 7 0.02 clknet_leaf_109_clock (net) |
| 0.07 0.00 2.29 ^ _19819_/CLK (sky130_fd_sc_hd__dfxtp_1) |
| 0.25 2.54 clock uncertainty |
| -0.07 2.48 clock reconvergence pessimism |
| -0.04 2.43 library hold time |
| 2.43 data required time |
| ----------------------------------------------------------------------------- |
| 2.43 data required time |
| -2.47 data arrival time |
| ----------------------------------------------------------------------------- |
| 0.04 slack (MET) |
| |
| |
| Startpoint: _19435_ (rising edge-triggered flip-flop clocked by clock) |
| Endpoint: _19436_ (rising edge-triggered flip-flop clocked by clock) |
| Path Group: clock |
| Path Type: min |
| |
| Fanout Cap Slew Delay Time Description |
| ----------------------------------------------------------------------------- |
| 0.00 0.00 clock clock (rise edge) |
| 0.00 0.00 clock source latency |
| 0.28 0.19 0.19 ^ clock (in) |
| 1 0.06 clock (net) |
| 0.28 0.00 0.19 ^ clkbuf_0_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.05 0.19 0.38 ^ clkbuf_0_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 2 0.02 clknet_0_clock (net) |
| 0.05 0.00 0.39 ^ clkbuf_1_1_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.05 0.10 0.49 ^ clkbuf_1_1_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 1 0.01 clknet_1_1_0_clock (net) |
| 0.05 0.00 0.49 ^ clkbuf_1_1_1_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.12 0.15 0.64 ^ clkbuf_1_1_1_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_1_1_1_clock (net) |
| 0.12 0.00 0.64 ^ clkbuf_2_3_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.18 0.22 0.85 ^ clkbuf_2_3_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.03 clknet_2_3_0_clock (net) |
| 0.18 0.00 0.85 ^ clkbuf_3_6_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.11 0.18 1.04 ^ clkbuf_3_6_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_3_6_0_clock (net) |
| 0.11 0.00 1.04 ^ clkbuf_4_13_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.98 0.73 1.77 ^ clkbuf_4_13_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 15 0.18 clknet_4_13_0_clock (net) |
| 0.98 0.00 1.77 ^ clkbuf_leaf_96_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.08 0.29 2.06 ^ clkbuf_leaf_96_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 10 0.03 clknet_leaf_96_clock (net) |
| 0.08 0.00 2.06 ^ _19435_/CLK (sky130_fd_sc_hd__dfxtp_1) |
| 0.07 0.33 2.39 v _19435_/Q (sky130_fd_sc_hd__dfxtp_1) |
| 5 0.01 dpath.csr.timeh[11] (net) |
| 0.07 0.00 2.39 v _16362_/A1 (sky130_fd_sc_hd__a21oi_1) |
| 0.11 0.13 2.52 ^ _16362_/Y (sky130_fd_sc_hd__a21oi_1) |
| 1 0.00 _02062_ (net) |
| 0.11 0.00 2.52 ^ _16364_/B (sky130_fd_sc_hd__nor3_1) |
| 0.04 0.06 2.58 v _16364_/Y (sky130_fd_sc_hd__nor3_1) |
| 1 0.00 _01201_ (net) |
| 0.04 0.00 2.58 v _19436_/D (sky130_fd_sc_hd__dfxtp_1) |
| 2.58 data arrival time |
| |
| 0.00 0.00 clock clock (rise edge) |
| 0.00 0.00 clock source latency |
| 0.28 0.21 0.21 ^ clock (in) |
| 1 0.06 clock (net) |
| 0.28 0.00 0.21 ^ clkbuf_0_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.05 0.21 0.43 ^ clkbuf_0_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 2 0.02 clknet_0_clock (net) |
| 0.05 0.00 0.43 ^ clkbuf_1_1_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.05 0.11 0.54 ^ clkbuf_1_1_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 1 0.01 clknet_1_1_0_clock (net) |
| 0.05 0.00 0.54 ^ clkbuf_1_1_1_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.12 0.17 0.70 ^ clkbuf_1_1_1_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_1_1_1_clock (net) |
| 0.12 0.00 0.70 ^ clkbuf_2_3_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.18 0.24 0.94 ^ clkbuf_2_3_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.03 clknet_2_3_0_clock (net) |
| 0.18 0.00 0.94 ^ clkbuf_3_7_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.12 0.21 1.16 ^ clkbuf_3_7_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_3_7_0_clock (net) |
| 0.12 0.00 1.16 ^ clkbuf_4_15_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.99 0.82 1.98 ^ clkbuf_4_15_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 14 0.19 clknet_4_15_0_clock (net) |
| 0.99 0.00 1.98 ^ clkbuf_opt_12_0_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.06 0.30 2.27 ^ clkbuf_opt_12_0_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 1 0.01 clknet_opt_12_0_clock (net) |
| 0.06 0.00 2.27 ^ clkbuf_leaf_97_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.05 0.15 2.42 ^ clkbuf_leaf_97_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 10 0.03 clknet_leaf_97_clock (net) |
| 0.05 0.00 2.42 ^ _19436_/CLK (sky130_fd_sc_hd__dfxtp_1) |
| 0.25 2.67 clock uncertainty |
| -0.09 2.58 clock reconvergence pessimism |
| -0.05 2.53 library hold time |
| 2.53 data required time |
| ----------------------------------------------------------------------------- |
| 2.53 data required time |
| -2.58 data arrival time |
| ----------------------------------------------------------------------------- |
| 0.05 slack (MET) |
| |
| |
| Startpoint: _19450_ (rising edge-triggered flip-flop clocked by clock) |
| Endpoint: _19451_ (rising edge-triggered flip-flop clocked by clock) |
| Path Group: clock |
| Path Type: min |
| |
| Fanout Cap Slew Delay Time Description |
| ----------------------------------------------------------------------------- |
| 0.00 0.00 clock clock (rise edge) |
| 0.00 0.00 clock source latency |
| 0.28 0.19 0.19 ^ clock (in) |
| 1 0.06 clock (net) |
| 0.28 0.00 0.19 ^ clkbuf_0_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.05 0.19 0.38 ^ clkbuf_0_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 2 0.02 clknet_0_clock (net) |
| 0.05 0.00 0.39 ^ clkbuf_1_1_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.05 0.10 0.49 ^ clkbuf_1_1_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 1 0.01 clknet_1_1_0_clock (net) |
| 0.05 0.00 0.49 ^ clkbuf_1_1_1_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.12 0.15 0.64 ^ clkbuf_1_1_1_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_1_1_1_clock (net) |
| 0.12 0.00 0.64 ^ clkbuf_2_3_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.18 0.22 0.85 ^ clkbuf_2_3_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.03 clknet_2_3_0_clock (net) |
| 0.18 0.00 0.85 ^ clkbuf_3_6_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.11 0.18 1.04 ^ clkbuf_3_6_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_3_6_0_clock (net) |
| 0.11 0.00 1.04 ^ clkbuf_4_13_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.98 0.73 1.77 ^ clkbuf_4_13_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 15 0.18 clknet_4_13_0_clock (net) |
| 0.98 0.00 1.77 ^ clkbuf_leaf_96_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.08 0.29 2.06 ^ clkbuf_leaf_96_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 10 0.03 clknet_leaf_96_clock (net) |
| 0.08 0.00 2.06 ^ _19450_/CLK (sky130_fd_sc_hd__dfxtp_1) |
| 0.08 0.33 2.40 v _19450_/Q (sky130_fd_sc_hd__dfxtp_1) |
| 5 0.02 dpath.csr.timeh[26] (net) |
| 0.08 0.00 2.40 v _16405_/A1 (sky130_fd_sc_hd__a21oi_1) |
| 0.10 0.13 2.53 ^ _16405_/Y (sky130_fd_sc_hd__a21oi_1) |
| 1 0.00 _02090_ (net) |
| 0.10 0.00 2.53 ^ _16407_/B (sky130_fd_sc_hd__nor3_1) |
| 0.04 0.06 2.59 v _16407_/Y (sky130_fd_sc_hd__nor3_1) |
| 1 0.00 _01216_ (net) |
| 0.04 0.00 2.59 v _19451_/D (sky130_fd_sc_hd__dfxtp_1) |
| 2.59 data arrival time |
| |
| 0.00 0.00 clock clock (rise edge) |
| 0.00 0.00 clock source latency |
| 0.28 0.21 0.21 ^ clock (in) |
| 1 0.06 clock (net) |
| 0.28 0.00 0.21 ^ clkbuf_0_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.05 0.21 0.43 ^ clkbuf_0_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 2 0.02 clknet_0_clock (net) |
| 0.05 0.00 0.43 ^ clkbuf_1_1_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.05 0.11 0.54 ^ clkbuf_1_1_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 1 0.01 clknet_1_1_0_clock (net) |
| 0.05 0.00 0.54 ^ clkbuf_1_1_1_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.12 0.17 0.70 ^ clkbuf_1_1_1_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_1_1_1_clock (net) |
| 0.12 0.00 0.70 ^ clkbuf_2_3_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.18 0.24 0.94 ^ clkbuf_2_3_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.03 clknet_2_3_0_clock (net) |
| 0.18 0.00 0.94 ^ clkbuf_3_7_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.12 0.21 1.16 ^ clkbuf_3_7_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_3_7_0_clock (net) |
| 0.12 0.00 1.16 ^ clkbuf_4_15_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.99 0.82 1.98 ^ clkbuf_4_15_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 14 0.19 clknet_4_15_0_clock (net) |
| 0.99 0.00 1.98 ^ clkbuf_opt_12_0_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.06 0.30 2.27 ^ clkbuf_opt_12_0_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 1 0.01 clknet_opt_12_0_clock (net) |
| 0.06 0.00 2.27 ^ clkbuf_leaf_97_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.05 0.15 2.42 ^ clkbuf_leaf_97_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 10 0.03 clknet_leaf_97_clock (net) |
| 0.05 0.00 2.42 ^ _19451_/CLK (sky130_fd_sc_hd__dfxtp_1) |
| 0.25 2.67 clock uncertainty |
| -0.09 2.58 clock reconvergence pessimism |
| -0.05 2.53 library hold time |
| 2.53 data required time |
| ----------------------------------------------------------------------------- |
| 2.53 data required time |
| -2.59 data arrival time |
| ----------------------------------------------------------------------------- |
| 0.05 slack (MET) |
| |
| |
| Startpoint: _19733_ (rising edge-triggered flip-flop clocked by clock) |
| Endpoint: _19164_ (rising edge-triggered flip-flop clocked by clock) |
| Path Group: clock |
| Path Type: min |
| |
| Fanout Cap Slew Delay Time Description |
| ----------------------------------------------------------------------------- |
| 0.00 0.00 clock clock (rise edge) |
| 0.00 0.00 clock source latency |
| 0.28 0.19 0.19 ^ clock (in) |
| 1 0.06 clock (net) |
| 0.28 0.00 0.19 ^ clkbuf_0_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.05 0.19 0.38 ^ clkbuf_0_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 2 0.02 clknet_0_clock (net) |
| 0.05 0.00 0.39 ^ clkbuf_1_1_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.05 0.10 0.49 ^ clkbuf_1_1_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 1 0.01 clknet_1_1_0_clock (net) |
| 0.05 0.00 0.49 ^ clkbuf_1_1_1_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.12 0.15 0.64 ^ clkbuf_1_1_1_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_1_1_1_clock (net) |
| 0.12 0.00 0.64 ^ clkbuf_2_2_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.19 0.22 0.86 ^ clkbuf_2_2_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.03 clknet_2_2_0_clock (net) |
| 0.19 0.00 0.86 ^ clkbuf_3_5_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.11 0.19 1.04 ^ clkbuf_3_5_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_3_5_0_clock (net) |
| 0.11 0.00 1.05 ^ clkbuf_4_10_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.50 0.42 1.47 ^ clkbuf_4_10_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 8 0.09 clknet_4_10_0_clock (net) |
| 0.50 0.00 1.47 ^ clkbuf_leaf_138_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.06 0.24 1.71 ^ clkbuf_leaf_138_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 9 0.03 clknet_leaf_138_clock (net) |
| 0.06 0.00 1.71 ^ _19733_/CLK (sky130_fd_sc_hd__dfxtp_4) |
| 0.17 0.42 2.13 ^ _19733_/Q (sky130_fd_sc_hd__dfxtp_4) |
| 5 0.06 dpath._T_249[26] (net) |
| 0.17 0.01 2.14 ^ _15609_/A0 (sky130_fd_sc_hd__mux2_1) |
| 0.04 0.14 2.28 ^ _15609_/X (sky130_fd_sc_hd__mux2_1) |
| 1 0.00 _09035_ (net) |
| 0.04 0.00 2.28 ^ _15610_/A0 (sky130_fd_sc_hd__mux2_1) |
| 0.05 0.11 2.39 ^ _15610_/X (sky130_fd_sc_hd__mux2_1) |
| 1 0.00 _09036_ (net) |
| 0.05 0.00 2.39 ^ _15611_/A (sky130_fd_sc_hd__clkbuf_1) |
| 0.04 0.07 2.46 ^ _15611_/X (sky130_fd_sc_hd__clkbuf_1) |
| 1 0.00 _00929_ (net) |
| 0.04 0.00 2.46 ^ _19164_/D (sky130_fd_sc_hd__dfxtp_1) |
| 2.46 data arrival time |
| |
| 0.00 0.00 clock clock (rise edge) |
| 0.00 0.00 clock source latency |
| 0.28 0.21 0.21 ^ clock (in) |
| 1 0.06 clock (net) |
| 0.28 0.00 0.21 ^ clkbuf_0_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.05 0.21 0.43 ^ clkbuf_0_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 2 0.02 clknet_0_clock (net) |
| 0.05 0.00 0.43 ^ clkbuf_1_1_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.05 0.11 0.54 ^ clkbuf_1_1_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 1 0.01 clknet_1_1_0_clock (net) |
| 0.05 0.00 0.54 ^ clkbuf_1_1_1_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.12 0.17 0.70 ^ clkbuf_1_1_1_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_1_1_1_clock (net) |
| 0.12 0.00 0.70 ^ clkbuf_2_3_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.18 0.24 0.94 ^ clkbuf_2_3_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.03 clknet_2_3_0_clock (net) |
| 0.18 0.00 0.94 ^ clkbuf_3_6_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.11 0.20 1.15 ^ clkbuf_3_6_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_3_6_0_clock (net) |
| 0.11 0.00 1.15 ^ clkbuf_4_12_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.90 0.75 1.90 ^ clkbuf_4_12_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 14 0.17 clknet_4_12_0_clock (net) |
| 0.90 0.00 1.90 ^ clkbuf_leaf_82_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.08 0.32 2.22 ^ clkbuf_leaf_82_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 12 0.04 clknet_leaf_82_clock (net) |
| 0.08 0.00 2.22 ^ _19164_/CLK (sky130_fd_sc_hd__dfxtp_1) |
| 0.25 2.47 clock uncertainty |
| -0.07 2.40 clock reconvergence pessimism |
| -0.03 2.38 library hold time |
| 2.38 data required time |
| ----------------------------------------------------------------------------- |
| 2.38 data required time |
| -2.46 data arrival time |
| ----------------------------------------------------------------------------- |
| 0.08 slack (MET) |
| |
| |
| min_report_end |
| max_report |
| |
| =========================================================================== |
| report_checks -path_delay max (Setup) |
| ============================================================================ |
| Startpoint: _19838_ (rising edge-triggered flip-flop clocked by clock) |
| Endpoint: io_ibus_addr[31] (output port clocked by clock) |
| Path Group: clock |
| Path Type: max |
| |
| Fanout Cap Slew Delay Time Description |
| ----------------------------------------------------------------------------- |
| 0.00 0.00 clock clock (rise edge) |
| 0.00 0.00 clock source latency |
| 0.28 0.21 0.21 ^ clock (in) |
| 1 0.06 clock (net) |
| 0.28 0.00 0.21 ^ clkbuf_0_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.05 0.21 0.43 ^ clkbuf_0_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 2 0.02 clknet_0_clock (net) |
| 0.05 0.00 0.43 ^ clkbuf_1_1_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.05 0.11 0.54 ^ clkbuf_1_1_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 1 0.01 clknet_1_1_0_clock (net) |
| 0.05 0.00 0.54 ^ clkbuf_1_1_1_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.12 0.17 0.70 ^ clkbuf_1_1_1_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_1_1_1_clock (net) |
| 0.12 0.00 0.70 ^ clkbuf_2_3_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.18 0.24 0.94 ^ clkbuf_2_3_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.03 clknet_2_3_0_clock (net) |
| 0.18 0.00 0.94 ^ clkbuf_3_7_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.12 0.21 1.16 ^ clkbuf_3_7_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_3_7_0_clock (net) |
| 0.12 0.00 1.16 ^ clkbuf_4_14_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.92 0.77 1.93 ^ clkbuf_4_14_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 13 0.17 clknet_4_14_0_clock (net) |
| 0.92 0.00 1.93 ^ clkbuf_leaf_116_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.07 0.31 2.24 ^ clkbuf_leaf_116_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 7 0.02 clknet_leaf_116_clock (net) |
| 0.07 0.00 2.24 ^ _19838_/CLK (sky130_fd_sc_hd__dfxtp_1) |
| 0.04 0.32 2.56 v _19838_/Q (sky130_fd_sc_hd__dfxtp_1) |
| 2 0.01 ctrl._T_135[3] (net) |
| 0.04 0.00 2.56 v _09078_/A (sky130_fd_sc_hd__or4bb_2) |
| 0.14 0.73 3.29 v _09078_/X (sky130_fd_sc_hd__or4bb_2) |
| 2 0.02 _03527_ (net) |
| 0.14 0.00 3.30 v _09079_/A (sky130_fd_sc_hd__dlymetal6s2s_1) |
| 0.09 0.24 3.53 v _09079_/X (sky130_fd_sc_hd__dlymetal6s2s_1) |
| 5 0.02 _03528_ (net) |
| 0.09 0.00 3.53 v _09180_/B (sky130_fd_sc_hd__or4_2) |
| 0.14 0.75 4.28 v _09180_/X (sky130_fd_sc_hd__or4_2) |
| 3 0.01 _03623_ (net) |
| 0.14 0.00 4.28 v _09181_/B (sky130_fd_sc_hd__and2b_1) |
| 0.05 0.23 4.51 v _09181_/X (sky130_fd_sc_hd__and2b_1) |
| 3 0.01 _03624_ (net) |
| 0.05 0.00 4.51 v _11505_/B (sky130_fd_sc_hd__and2b_2) |
| 0.08 0.26 4.77 v _11505_/X (sky130_fd_sc_hd__and2b_2) |
| 5 0.02 _05945_ (net) |
| 0.08 0.00 4.77 v _11673_/S (sky130_fd_sc_hd__mux2_1) |
| 0.06 0.34 5.11 v _11673_/X (sky130_fd_sc_hd__mux2_1) |
| 1 0.00 _06105_ (net) |
| 0.06 0.00 5.11 v _11674_/A2 (sky130_fd_sc_hd__a21o_2) |
| 0.09 0.29 5.40 v _11674_/X (sky130_fd_sc_hd__a21o_2) |
| 2 0.03 _06106_ (net) |
| 0.09 0.00 5.40 v _11715_/B1 (sky130_fd_sc_hd__o21ai_2) |
| 0.20 0.12 5.52 ^ _11715_/Y (sky130_fd_sc_hd__o21ai_2) |
| 3 0.01 _06145_ (net) |
| 0.20 0.00 5.52 ^ _11716_/C (sky130_fd_sc_hd__and4b_1) |
| 0.11 0.27 5.79 ^ _11716_/X (sky130_fd_sc_hd__and4b_1) |
| 2 0.01 _06146_ (net) |
| 0.11 0.00 5.79 ^ _11717_/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.15 0.21 6.01 ^ _11717_/X (sky130_fd_sc_hd__clkbuf_2) |
| 5 0.03 _06147_ (net) |
| 0.15 0.00 6.01 ^ _11842_/A (sky130_fd_sc_hd__nand4_4) |
| 0.14 0.15 6.16 v _11842_/Y (sky130_fd_sc_hd__nand4_4) |
| 5 0.02 _06264_ (net) |
| 0.14 0.00 6.16 v _11950_/A (sky130_fd_sc_hd__or4_2) |
| 0.14 0.78 6.95 v _11950_/X (sky130_fd_sc_hd__or4_2) |
| 4 0.01 _06364_ (net) |
| 0.14 0.00 6.95 v _12025_/B (sky130_fd_sc_hd__or4_2) |
| 0.14 0.76 7.71 v _12025_/X (sky130_fd_sc_hd__or4_2) |
| 4 0.01 _06433_ (net) |
| 0.14 0.00 7.71 v _12140_/B (sky130_fd_sc_hd__nor4_1) |
| 0.48 0.50 8.21 ^ _12140_/Y (sky130_fd_sc_hd__nor4_1) |
| 2 0.01 _06540_ (net) |
| 0.48 0.00 8.21 ^ _12163_/A2 (sky130_fd_sc_hd__a21oi_2) |
| 0.11 0.16 8.37 v _12163_/Y (sky130_fd_sc_hd__a21oi_2) |
| 3 0.01 _06561_ (net) |
| 0.11 0.00 8.37 v _12212_/A2 (sky130_fd_sc_hd__o31a_1) |
| 0.06 0.32 8.69 v _12212_/X (sky130_fd_sc_hd__o31a_1) |
| 2 0.00 _06606_ (net) |
| 0.06 0.00 8.69 v _12213_/B (sky130_fd_sc_hd__nor2_1) |
| 0.17 0.16 8.85 ^ _12213_/Y (sky130_fd_sc_hd__nor2_1) |
| 3 0.01 _06607_ (net) |
| 0.17 0.00 8.85 ^ _12262_/A1 (sky130_fd_sc_hd__a21o_2) |
| 0.11 0.22 9.07 ^ _12262_/X (sky130_fd_sc_hd__a21o_2) |
| 2 0.02 _06652_ (net) |
| 0.11 0.00 9.07 ^ _12282_/B1_N (sky130_fd_sc_hd__a21boi_1) |
| 0.20 0.24 9.31 ^ _12282_/Y (sky130_fd_sc_hd__a21boi_1) |
| 2 0.01 _06670_ (net) |
| 0.20 0.00 9.31 ^ _12306_/B1_N (sky130_fd_sc_hd__a21bo_1) |
| 0.06 0.27 9.59 v _12306_/X (sky130_fd_sc_hd__a21bo_1) |
| 2 0.01 _06692_ (net) |
| 0.06 0.00 9.59 v _12331_/B1 (sky130_fd_sc_hd__a21oi_2) |
| 0.26 0.24 9.83 ^ _12331_/Y (sky130_fd_sc_hd__a21oi_2) |
| 2 0.02 _06715_ (net) |
| 0.26 0.00 9.83 ^ _12332_/B (sky130_fd_sc_hd__xnor2_4) |
| 0.25 0.20 10.03 ^ _12332_/Y (sky130_fd_sc_hd__xnor2_4) |
| 3 0.03 _06716_ (net) |
| 0.25 0.00 10.03 ^ _12334_/A (sky130_fd_sc_hd__xor2_4) |
| 0.20 0.25 10.28 ^ _12334_/X (sky130_fd_sc_hd__xor2_4) |
| 2 0.02 _06718_ (net) |
| 0.20 0.00 10.28 ^ _12347_/B (sky130_fd_sc_hd__nand2_1) |
| 0.06 0.10 10.38 v _12347_/Y (sky130_fd_sc_hd__nand2_1) |
| 2 0.00 _06729_ (net) |
| 0.06 0.00 10.38 v _12348_/B (sky130_fd_sc_hd__or4bb_1) |
| 0.10 0.53 10.91 v _12348_/X (sky130_fd_sc_hd__or4bb_1) |
| 2 0.01 _06730_ (net) |
| 0.10 0.00 10.91 v _12362_/A1 (sky130_fd_sc_hd__a21o_1) |
| 0.08 0.23 11.14 v _12362_/X (sky130_fd_sc_hd__a21o_1) |
| 4 0.02 _06744_ (net) |
| 0.08 0.00 11.14 v _12420_/A2 (sky130_fd_sc_hd__a311o_1) |
| 0.10 0.40 11.54 v _12420_/X (sky130_fd_sc_hd__a311o_1) |
| 2 0.01 _06796_ (net) |
| 0.10 0.00 11.54 v _12431_/A2 (sky130_fd_sc_hd__a21o_2) |
| 0.10 0.32 11.86 v _12431_/X (sky130_fd_sc_hd__a21o_2) |
| 3 0.03 _06807_ (net) |
| 0.10 0.00 11.86 v _12433_/A2 (sky130_fd_sc_hd__a21boi_2) |
| 0.24 0.28 12.14 ^ _12433_/Y (sky130_fd_sc_hd__a21boi_2) |
| 1 0.02 _06808_ (net) |
| 0.24 0.00 12.14 ^ _12437_/A2 (sky130_fd_sc_hd__o31a_1) |
| 0.16 0.26 12.41 ^ _12437_/X (sky130_fd_sc_hd__o31a_1) |
| 2 0.01 _06812_ (net) |
| 0.16 0.00 12.41 ^ _12441_/B1 (sky130_fd_sc_hd__o22a_4) |
| 0.12 0.24 12.64 ^ _12441_/X (sky130_fd_sc_hd__o22a_4) |
| 1 0.04 net166 (net) |
| 0.12 0.00 12.65 ^ output166/A (sky130_fd_sc_hd__buf_2) |
| 0.18 0.25 12.90 ^ output166/X (sky130_fd_sc_hd__buf_2) |
| 1 0.03 io_ibus_addr[31] (net) |
| 0.18 0.00 12.90 ^ io_ibus_addr[31] (out) |
| 12.90 data arrival time |
| |
| 20.00 20.00 clock clock (rise edge) |
| 0.00 20.00 clock network delay (propagated) |
| -0.25 19.75 clock uncertainty |
| 0.00 19.75 clock reconvergence pessimism |
| -4.00 15.75 output external delay |
| 15.75 data required time |
| ----------------------------------------------------------------------------- |
| 15.75 data required time |
| -12.90 data arrival time |
| ----------------------------------------------------------------------------- |
| 2.85 slack (MET) |
| |
| |
| Startpoint: _19838_ (rising edge-triggered flip-flop clocked by clock) |
| Endpoint: io_ibus_addr[30] (output port clocked by clock) |
| Path Group: clock |
| Path Type: max |
| |
| Fanout Cap Slew Delay Time Description |
| ----------------------------------------------------------------------------- |
| 0.00 0.00 clock clock (rise edge) |
| 0.00 0.00 clock source latency |
| 0.28 0.21 0.21 ^ clock (in) |
| 1 0.06 clock (net) |
| 0.28 0.00 0.21 ^ clkbuf_0_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.05 0.21 0.43 ^ clkbuf_0_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 2 0.02 clknet_0_clock (net) |
| 0.05 0.00 0.43 ^ clkbuf_1_1_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.05 0.11 0.54 ^ clkbuf_1_1_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 1 0.01 clknet_1_1_0_clock (net) |
| 0.05 0.00 0.54 ^ clkbuf_1_1_1_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.12 0.17 0.70 ^ clkbuf_1_1_1_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_1_1_1_clock (net) |
| 0.12 0.00 0.70 ^ clkbuf_2_3_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.18 0.24 0.94 ^ clkbuf_2_3_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.03 clknet_2_3_0_clock (net) |
| 0.18 0.00 0.94 ^ clkbuf_3_7_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.12 0.21 1.16 ^ clkbuf_3_7_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_3_7_0_clock (net) |
| 0.12 0.00 1.16 ^ clkbuf_4_14_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.92 0.77 1.93 ^ clkbuf_4_14_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 13 0.17 clknet_4_14_0_clock (net) |
| 0.92 0.00 1.93 ^ clkbuf_leaf_116_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.07 0.31 2.24 ^ clkbuf_leaf_116_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 7 0.02 clknet_leaf_116_clock (net) |
| 0.07 0.00 2.24 ^ _19838_/CLK (sky130_fd_sc_hd__dfxtp_1) |
| 0.04 0.32 2.56 v _19838_/Q (sky130_fd_sc_hd__dfxtp_1) |
| 2 0.01 ctrl._T_135[3] (net) |
| 0.04 0.00 2.56 v _09078_/A (sky130_fd_sc_hd__or4bb_2) |
| 0.14 0.73 3.29 v _09078_/X (sky130_fd_sc_hd__or4bb_2) |
| 2 0.02 _03527_ (net) |
| 0.14 0.00 3.30 v _09079_/A (sky130_fd_sc_hd__dlymetal6s2s_1) |
| 0.09 0.24 3.53 v _09079_/X (sky130_fd_sc_hd__dlymetal6s2s_1) |
| 5 0.02 _03528_ (net) |
| 0.09 0.00 3.53 v _09180_/B (sky130_fd_sc_hd__or4_2) |
| 0.14 0.75 4.28 v _09180_/X (sky130_fd_sc_hd__or4_2) |
| 3 0.01 _03623_ (net) |
| 0.14 0.00 4.28 v _09181_/B (sky130_fd_sc_hd__and2b_1) |
| 0.05 0.23 4.51 v _09181_/X (sky130_fd_sc_hd__and2b_1) |
| 3 0.01 _03624_ (net) |
| 0.05 0.00 4.51 v _11505_/B (sky130_fd_sc_hd__and2b_2) |
| 0.08 0.26 4.77 v _11505_/X (sky130_fd_sc_hd__and2b_2) |
| 5 0.02 _05945_ (net) |
| 0.08 0.00 4.77 v _11673_/S (sky130_fd_sc_hd__mux2_1) |
| 0.06 0.34 5.11 v _11673_/X (sky130_fd_sc_hd__mux2_1) |
| 1 0.00 _06105_ (net) |
| 0.06 0.00 5.11 v _11674_/A2 (sky130_fd_sc_hd__a21o_2) |
| 0.09 0.29 5.40 v _11674_/X (sky130_fd_sc_hd__a21o_2) |
| 2 0.03 _06106_ (net) |
| 0.09 0.00 5.40 v _11715_/B1 (sky130_fd_sc_hd__o21ai_2) |
| 0.20 0.12 5.52 ^ _11715_/Y (sky130_fd_sc_hd__o21ai_2) |
| 3 0.01 _06145_ (net) |
| 0.20 0.00 5.52 ^ _11716_/C (sky130_fd_sc_hd__and4b_1) |
| 0.11 0.27 5.79 ^ _11716_/X (sky130_fd_sc_hd__and4b_1) |
| 2 0.01 _06146_ (net) |
| 0.11 0.00 5.79 ^ _11717_/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.15 0.21 6.01 ^ _11717_/X (sky130_fd_sc_hd__clkbuf_2) |
| 5 0.03 _06147_ (net) |
| 0.15 0.00 6.01 ^ _11842_/A (sky130_fd_sc_hd__nand4_4) |
| 0.14 0.15 6.16 v _11842_/Y (sky130_fd_sc_hd__nand4_4) |
| 5 0.02 _06264_ (net) |
| 0.14 0.00 6.16 v _11950_/A (sky130_fd_sc_hd__or4_2) |
| 0.14 0.78 6.95 v _11950_/X (sky130_fd_sc_hd__or4_2) |
| 4 0.01 _06364_ (net) |
| 0.14 0.00 6.95 v _12025_/B (sky130_fd_sc_hd__or4_2) |
| 0.14 0.76 7.71 v _12025_/X (sky130_fd_sc_hd__or4_2) |
| 4 0.01 _06433_ (net) |
| 0.14 0.00 7.71 v _12140_/B (sky130_fd_sc_hd__nor4_1) |
| 0.48 0.50 8.21 ^ _12140_/Y (sky130_fd_sc_hd__nor4_1) |
| 2 0.01 _06540_ (net) |
| 0.48 0.00 8.21 ^ _12163_/A2 (sky130_fd_sc_hd__a21oi_2) |
| 0.11 0.16 8.37 v _12163_/Y (sky130_fd_sc_hd__a21oi_2) |
| 3 0.01 _06561_ (net) |
| 0.11 0.00 8.37 v _12212_/A2 (sky130_fd_sc_hd__o31a_1) |
| 0.06 0.32 8.69 v _12212_/X (sky130_fd_sc_hd__o31a_1) |
| 2 0.00 _06606_ (net) |
| 0.06 0.00 8.69 v _12213_/B (sky130_fd_sc_hd__nor2_1) |
| 0.17 0.16 8.85 ^ _12213_/Y (sky130_fd_sc_hd__nor2_1) |
| 3 0.01 _06607_ (net) |
| 0.17 0.00 8.85 ^ _12262_/A1 (sky130_fd_sc_hd__a21o_2) |
| 0.11 0.22 9.07 ^ _12262_/X (sky130_fd_sc_hd__a21o_2) |
| 2 0.02 _06652_ (net) |
| 0.11 0.00 9.07 ^ _12282_/B1_N (sky130_fd_sc_hd__a21boi_1) |
| 0.20 0.24 9.31 ^ _12282_/Y (sky130_fd_sc_hd__a21boi_1) |
| 2 0.01 _06670_ (net) |
| 0.20 0.00 9.31 ^ _12306_/B1_N (sky130_fd_sc_hd__a21bo_1) |
| 0.06 0.27 9.59 v _12306_/X (sky130_fd_sc_hd__a21bo_1) |
| 2 0.01 _06692_ (net) |
| 0.06 0.00 9.59 v _12331_/B1 (sky130_fd_sc_hd__a21oi_2) |
| 0.26 0.24 9.83 ^ _12331_/Y (sky130_fd_sc_hd__a21oi_2) |
| 2 0.02 _06715_ (net) |
| 0.26 0.00 9.83 ^ _12332_/B (sky130_fd_sc_hd__xnor2_4) |
| 0.25 0.20 10.03 ^ _12332_/Y (sky130_fd_sc_hd__xnor2_4) |
| 3 0.03 _06716_ (net) |
| 0.25 0.00 10.03 ^ _12334_/A (sky130_fd_sc_hd__xor2_4) |
| 0.20 0.25 10.28 ^ _12334_/X (sky130_fd_sc_hd__xor2_4) |
| 2 0.02 _06718_ (net) |
| 0.20 0.00 10.28 ^ _12347_/B (sky130_fd_sc_hd__nand2_1) |
| 0.06 0.10 10.38 v _12347_/Y (sky130_fd_sc_hd__nand2_1) |
| 2 0.00 _06729_ (net) |
| 0.06 0.00 10.38 v _12348_/B (sky130_fd_sc_hd__or4bb_1) |
| 0.10 0.53 10.91 v _12348_/X (sky130_fd_sc_hd__or4bb_1) |
| 2 0.01 _06730_ (net) |
| 0.10 0.00 10.91 v _12362_/A1 (sky130_fd_sc_hd__a21o_1) |
| 0.08 0.23 11.14 v _12362_/X (sky130_fd_sc_hd__a21o_1) |
| 4 0.02 _06744_ (net) |
| 0.08 0.00 11.14 v _12407_/A2 (sky130_fd_sc_hd__a31o_1) |
| 0.09 0.29 11.43 v _12407_/X (sky130_fd_sc_hd__a31o_1) |
| 1 0.02 _06785_ (net) |
| 0.09 0.00 11.43 v _12408_/B (sky130_fd_sc_hd__xor2_4) |
| 0.45 0.43 11.87 ^ _12408_/X (sky130_fd_sc_hd__xor2_4) |
| 3 0.06 net94 (net) |
| 0.45 0.01 11.87 ^ _12412_/A2 (sky130_fd_sc_hd__a21bo_1) |
| 0.08 0.21 12.09 ^ _12412_/X (sky130_fd_sc_hd__a21bo_1) |
| 1 0.01 _06789_ (net) |
| 0.08 0.00 12.09 ^ _12413_/B1 (sky130_fd_sc_hd__o211a_1) |
| 0.11 0.21 12.30 ^ _12413_/X (sky130_fd_sc_hd__o211a_1) |
| 2 0.01 _06790_ (net) |
| 0.11 0.00 12.30 ^ _12418_/B1 (sky130_fd_sc_hd__o22a_4) |
| 0.12 0.23 12.52 ^ _12418_/X (sky130_fd_sc_hd__o22a_4) |
| 1 0.04 net165 (net) |
| 0.12 0.00 12.53 ^ output165/A (sky130_fd_sc_hd__buf_2) |
| 0.18 0.24 12.77 ^ output165/X (sky130_fd_sc_hd__buf_2) |
| 1 0.03 io_ibus_addr[30] (net) |
| 0.18 0.00 12.77 ^ io_ibus_addr[30] (out) |
| 12.77 data arrival time |
| |
| 20.00 20.00 clock clock (rise edge) |
| 0.00 20.00 clock network delay (propagated) |
| -0.25 19.75 clock uncertainty |
| 0.00 19.75 clock reconvergence pessimism |
| -4.00 15.75 output external delay |
| 15.75 data required time |
| ----------------------------------------------------------------------------- |
| 15.75 data required time |
| -12.77 data arrival time |
| ----------------------------------------------------------------------------- |
| 2.98 slack (MET) |
| |
| |
| Startpoint: _19838_ (rising edge-triggered flip-flop clocked by clock) |
| Endpoint: io_ibus_addr[29] (output port clocked by clock) |
| Path Group: clock |
| Path Type: max |
| |
| Fanout Cap Slew Delay Time Description |
| ----------------------------------------------------------------------------- |
| 0.00 0.00 clock clock (rise edge) |
| 0.00 0.00 clock source latency |
| 0.28 0.21 0.21 ^ clock (in) |
| 1 0.06 clock (net) |
| 0.28 0.00 0.21 ^ clkbuf_0_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.05 0.21 0.43 ^ clkbuf_0_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 2 0.02 clknet_0_clock (net) |
| 0.05 0.00 0.43 ^ clkbuf_1_1_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.05 0.11 0.54 ^ clkbuf_1_1_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 1 0.01 clknet_1_1_0_clock (net) |
| 0.05 0.00 0.54 ^ clkbuf_1_1_1_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.12 0.17 0.70 ^ clkbuf_1_1_1_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_1_1_1_clock (net) |
| 0.12 0.00 0.70 ^ clkbuf_2_3_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.18 0.24 0.94 ^ clkbuf_2_3_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.03 clknet_2_3_0_clock (net) |
| 0.18 0.00 0.94 ^ clkbuf_3_7_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.12 0.21 1.16 ^ clkbuf_3_7_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_3_7_0_clock (net) |
| 0.12 0.00 1.16 ^ clkbuf_4_14_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.92 0.77 1.93 ^ clkbuf_4_14_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 13 0.17 clknet_4_14_0_clock (net) |
| 0.92 0.00 1.93 ^ clkbuf_leaf_116_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.07 0.31 2.24 ^ clkbuf_leaf_116_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 7 0.02 clknet_leaf_116_clock (net) |
| 0.07 0.00 2.24 ^ _19838_/CLK (sky130_fd_sc_hd__dfxtp_1) |
| 0.04 0.32 2.56 v _19838_/Q (sky130_fd_sc_hd__dfxtp_1) |
| 2 0.01 ctrl._T_135[3] (net) |
| 0.04 0.00 2.56 v _09078_/A (sky130_fd_sc_hd__or4bb_2) |
| 0.14 0.73 3.29 v _09078_/X (sky130_fd_sc_hd__or4bb_2) |
| 2 0.02 _03527_ (net) |
| 0.14 0.00 3.30 v _09079_/A (sky130_fd_sc_hd__dlymetal6s2s_1) |
| 0.09 0.24 3.53 v _09079_/X (sky130_fd_sc_hd__dlymetal6s2s_1) |
| 5 0.02 _03528_ (net) |
| 0.09 0.00 3.53 v _09180_/B (sky130_fd_sc_hd__or4_2) |
| 0.14 0.75 4.28 v _09180_/X (sky130_fd_sc_hd__or4_2) |
| 3 0.01 _03623_ (net) |
| 0.14 0.00 4.28 v _09181_/B (sky130_fd_sc_hd__and2b_1) |
| 0.05 0.23 4.51 v _09181_/X (sky130_fd_sc_hd__and2b_1) |
| 3 0.01 _03624_ (net) |
| 0.05 0.00 4.51 v _11505_/B (sky130_fd_sc_hd__and2b_2) |
| 0.08 0.26 4.77 v _11505_/X (sky130_fd_sc_hd__and2b_2) |
| 5 0.02 _05945_ (net) |
| 0.08 0.00 4.77 v _11673_/S (sky130_fd_sc_hd__mux2_1) |
| 0.06 0.34 5.11 v _11673_/X (sky130_fd_sc_hd__mux2_1) |
| 1 0.00 _06105_ (net) |
| 0.06 0.00 5.11 v _11674_/A2 (sky130_fd_sc_hd__a21o_2) |
| 0.09 0.29 5.40 v _11674_/X (sky130_fd_sc_hd__a21o_2) |
| 2 0.03 _06106_ (net) |
| 0.09 0.00 5.40 v _11715_/B1 (sky130_fd_sc_hd__o21ai_2) |
| 0.20 0.12 5.52 ^ _11715_/Y (sky130_fd_sc_hd__o21ai_2) |
| 3 0.01 _06145_ (net) |
| 0.20 0.00 5.52 ^ _11716_/C (sky130_fd_sc_hd__and4b_1) |
| 0.11 0.27 5.79 ^ _11716_/X (sky130_fd_sc_hd__and4b_1) |
| 2 0.01 _06146_ (net) |
| 0.11 0.00 5.79 ^ _11717_/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.15 0.21 6.01 ^ _11717_/X (sky130_fd_sc_hd__clkbuf_2) |
| 5 0.03 _06147_ (net) |
| 0.15 0.00 6.01 ^ _11842_/A (sky130_fd_sc_hd__nand4_4) |
| 0.14 0.15 6.16 v _11842_/Y (sky130_fd_sc_hd__nand4_4) |
| 5 0.02 _06264_ (net) |
| 0.14 0.00 6.16 v _11950_/A (sky130_fd_sc_hd__or4_2) |
| 0.14 0.78 6.95 v _11950_/X (sky130_fd_sc_hd__or4_2) |
| 4 0.01 _06364_ (net) |
| 0.14 0.00 6.95 v _12025_/B (sky130_fd_sc_hd__or4_2) |
| 0.14 0.76 7.71 v _12025_/X (sky130_fd_sc_hd__or4_2) |
| 4 0.01 _06433_ (net) |
| 0.14 0.00 7.71 v _12140_/B (sky130_fd_sc_hd__nor4_1) |
| 0.48 0.50 8.21 ^ _12140_/Y (sky130_fd_sc_hd__nor4_1) |
| 2 0.01 _06540_ (net) |
| 0.48 0.00 8.21 ^ _12163_/A2 (sky130_fd_sc_hd__a21oi_2) |
| 0.11 0.16 8.37 v _12163_/Y (sky130_fd_sc_hd__a21oi_2) |
| 3 0.01 _06561_ (net) |
| 0.11 0.00 8.37 v _12212_/A2 (sky130_fd_sc_hd__o31a_1) |
| 0.06 0.32 8.69 v _12212_/X (sky130_fd_sc_hd__o31a_1) |
| 2 0.00 _06606_ (net) |
| 0.06 0.00 8.69 v _12213_/B (sky130_fd_sc_hd__nor2_1) |
| 0.17 0.16 8.85 ^ _12213_/Y (sky130_fd_sc_hd__nor2_1) |
| 3 0.01 _06607_ (net) |
| 0.17 0.00 8.85 ^ _12262_/A1 (sky130_fd_sc_hd__a21o_2) |
| 0.11 0.22 9.07 ^ _12262_/X (sky130_fd_sc_hd__a21o_2) |
| 2 0.02 _06652_ (net) |
| 0.11 0.00 9.07 ^ _12282_/B1_N (sky130_fd_sc_hd__a21boi_1) |
| 0.20 0.24 9.31 ^ _12282_/Y (sky130_fd_sc_hd__a21boi_1) |
| 2 0.01 _06670_ (net) |
| 0.20 0.00 9.31 ^ _12306_/B1_N (sky130_fd_sc_hd__a21bo_1) |
| 0.06 0.27 9.59 v _12306_/X (sky130_fd_sc_hd__a21bo_1) |
| 2 0.01 _06692_ (net) |
| 0.06 0.00 9.59 v _12331_/B1 (sky130_fd_sc_hd__a21oi_2) |
| 0.26 0.24 9.83 ^ _12331_/Y (sky130_fd_sc_hd__a21oi_2) |
| 2 0.02 _06715_ (net) |
| 0.26 0.00 9.83 ^ _12332_/B (sky130_fd_sc_hd__xnor2_4) |
| 0.25 0.20 10.03 ^ _12332_/Y (sky130_fd_sc_hd__xnor2_4) |
| 3 0.03 _06716_ (net) |
| 0.25 0.00 10.03 ^ _12334_/A (sky130_fd_sc_hd__xor2_4) |
| 0.20 0.25 10.28 ^ _12334_/X (sky130_fd_sc_hd__xor2_4) |
| 2 0.02 _06718_ (net) |
| 0.20 0.00 10.28 ^ _12347_/B (sky130_fd_sc_hd__nand2_1) |
| 0.06 0.10 10.38 v _12347_/Y (sky130_fd_sc_hd__nand2_1) |
| 2 0.00 _06729_ (net) |
| 0.06 0.00 10.38 v _12348_/B (sky130_fd_sc_hd__or4bb_1) |
| 0.10 0.53 10.91 v _12348_/X (sky130_fd_sc_hd__or4bb_1) |
| 2 0.01 _06730_ (net) |
| 0.10 0.00 10.91 v _12362_/A1 (sky130_fd_sc_hd__a21o_1) |
| 0.08 0.23 11.14 v _12362_/X (sky130_fd_sc_hd__a21o_1) |
| 4 0.02 _06744_ (net) |
| 0.08 0.00 11.14 v _12388_/B (sky130_fd_sc_hd__nand2_2) |
| 0.10 0.13 11.27 ^ _12388_/Y (sky130_fd_sc_hd__nand2_2) |
| 1 0.02 _06768_ (net) |
| 0.10 0.00 11.27 ^ _12389_/B (sky130_fd_sc_hd__xnor2_4) |
| 0.17 0.17 11.44 v _12389_/Y (sky130_fd_sc_hd__xnor2_4) |
| 3 0.06 net92 (net) |
| 0.17 0.00 11.45 v _12392_/A1 (sky130_fd_sc_hd__mux2_1) |
| 0.07 0.38 11.83 v _12392_/X (sky130_fd_sc_hd__mux2_1) |
| 1 0.01 _06771_ (net) |
| 0.07 0.00 11.83 v _12393_/B2 (sky130_fd_sc_hd__o221a_1) |
| 0.08 0.26 12.09 v _12393_/X (sky130_fd_sc_hd__o221a_1) |
| 2 0.01 _06772_ (net) |
| 0.08 0.00 12.09 v _12397_/B1 (sky130_fd_sc_hd__o22a_4) |
| 0.09 0.29 12.38 v _12397_/X (sky130_fd_sc_hd__o22a_4) |
| 1 0.04 net163 (net) |
| 0.09 0.01 12.39 v output163/A (sky130_fd_sc_hd__buf_2) |
| 0.09 0.21 12.60 v output163/X (sky130_fd_sc_hd__buf_2) |
| 1 0.03 io_ibus_addr[29] (net) |
| 0.09 0.00 12.60 v io_ibus_addr[29] (out) |
| 12.60 data arrival time |
| |
| 20.00 20.00 clock clock (rise edge) |
| 0.00 20.00 clock network delay (propagated) |
| -0.25 19.75 clock uncertainty |
| 0.00 19.75 clock reconvergence pessimism |
| -4.00 15.75 output external delay |
| 15.75 data required time |
| ----------------------------------------------------------------------------- |
| 15.75 data required time |
| -12.60 data arrival time |
| ----------------------------------------------------------------------------- |
| 3.15 slack (MET) |
| |
| |
| Startpoint: _18779_ (rising edge-triggered flip-flop clocked by clock) |
| Endpoint: io_ibus_addr[22] (output port clocked by clock) |
| Path Group: clock |
| Path Type: max |
| |
| Fanout Cap Slew Delay Time Description |
| ----------------------------------------------------------------------------- |
| 0.00 0.00 clock clock (rise edge) |
| 0.00 0.00 clock source latency |
| 0.28 0.21 0.21 ^ clock (in) |
| 1 0.06 clock (net) |
| 0.28 0.00 0.21 ^ clkbuf_0_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.05 0.21 0.43 ^ clkbuf_0_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 2 0.02 clknet_0_clock (net) |
| 0.05 0.00 0.43 ^ clkbuf_1_1_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.05 0.11 0.54 ^ clkbuf_1_1_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 1 0.01 clknet_1_1_0_clock (net) |
| 0.05 0.00 0.54 ^ clkbuf_1_1_1_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.12 0.17 0.70 ^ clkbuf_1_1_1_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_1_1_1_clock (net) |
| 0.12 0.00 0.70 ^ clkbuf_2_2_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.19 0.24 0.95 ^ clkbuf_2_2_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.03 clknet_2_2_0_clock (net) |
| 0.19 0.00 0.95 ^ clkbuf_3_5_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.11 0.21 1.15 ^ clkbuf_3_5_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_3_5_0_clock (net) |
| 0.11 0.00 1.16 ^ clkbuf_4_10_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.50 0.47 1.62 ^ clkbuf_4_10_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 8 0.09 clknet_4_10_0_clock (net) |
| 0.50 0.00 1.63 ^ clkbuf_leaf_146_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.06 0.26 1.89 ^ clkbuf_leaf_146_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 8 0.03 clknet_leaf_146_clock (net) |
| 0.06 0.00 1.89 ^ _18779_/CLK (sky130_fd_sc_hd__dfxtp_1) |
| 0.21 0.45 2.34 ^ _18779_/Q (sky130_fd_sc_hd__dfxtp_1) |
| 4 0.02 _00005_ (net) |
| 0.21 0.00 2.34 ^ _09382_/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.14 0.24 2.57 ^ _09382_/X (sky130_fd_sc_hd__clkbuf_2) |
| 5 0.03 _03824_ (net) |
| 0.14 0.00 2.57 ^ _09383_/A (sky130_fd_sc_hd__buf_4) |
| 0.17 0.25 2.83 ^ _09383_/X (sky130_fd_sc_hd__buf_4) |
| 5 0.06 _03825_ (net) |
| 0.17 0.00 2.83 ^ _09384_/A (sky130_fd_sc_hd__buf_2) |
| 0.14 0.23 3.06 ^ _09384_/X (sky130_fd_sc_hd__buf_2) |
| 5 0.03 _03826_ (net) |
| 0.14 0.00 3.06 ^ _09385_/A (sky130_fd_sc_hd__clkbuf_4) |
| 0.12 0.24 3.30 ^ _09385_/X (sky130_fd_sc_hd__clkbuf_4) |
| 5 0.04 _03827_ (net) |
| 0.12 0.00 3.30 ^ _09598_/A (sky130_fd_sc_hd__clkbuf_4) |
| 0.14 0.25 3.54 ^ _09598_/X (sky130_fd_sc_hd__clkbuf_4) |
| 5 0.04 _04040_ (net) |
| 0.14 0.00 3.55 ^ _10654_/A (sky130_fd_sc_hd__buf_4) |
| 0.15 0.24 3.78 ^ _10654_/X (sky130_fd_sc_hd__buf_4) |
| 5 0.05 _05096_ (net) |
| 0.15 0.01 3.79 ^ _10752_/S0 (sky130_fd_sc_hd__mux4_1) |
| 0.12 0.65 4.44 v _10752_/X (sky130_fd_sc_hd__mux4_1) |
| 1 0.01 _05194_ (net) |
| 0.12 0.00 4.44 v _10753_/B (sky130_fd_sc_hd__or2_1) |
| 0.06 0.26 4.70 v _10753_/X (sky130_fd_sc_hd__or2_1) |
| 1 0.01 _05195_ (net) |
| 0.06 0.00 4.70 v _10760_/A2 (sky130_fd_sc_hd__a311o_4) |
| 0.09 0.44 5.14 v _10760_/X (sky130_fd_sc_hd__a311o_4) |
| 1 0.03 _05202_ (net) |
| 0.09 0.00 5.14 v _10772_/A2 (sky130_fd_sc_hd__a32o_2) |
| 0.09 0.35 5.50 v _10772_/X (sky130_fd_sc_hd__a32o_2) |
| 4 0.02 _05214_ (net) |
| 0.09 0.00 5.50 v _10797_/A (sky130_fd_sc_hd__or2_1) |
| 0.09 0.30 5.80 v _10797_/X (sky130_fd_sc_hd__or2_1) |
| 4 0.01 _05239_ (net) |
| 0.09 0.00 5.80 v _11296_/A2 (sky130_fd_sc_hd__a311o_1) |
| 0.09 0.39 6.18 v _11296_/X (sky130_fd_sc_hd__a311o_1) |
| 3 0.01 _05738_ (net) |
| 0.09 0.00 6.18 v _11346_/A3 (sky130_fd_sc_hd__a41o_1) |
| 0.08 0.30 6.48 v _11346_/X (sky130_fd_sc_hd__a41o_1) |
| 3 0.01 _05788_ (net) |
| 0.08 0.00 6.48 v _11348_/A2 (sky130_fd_sc_hd__a211o_1) |
| 0.09 0.36 6.85 v _11348_/X (sky130_fd_sc_hd__a211o_1) |
| 4 0.01 _05790_ (net) |
| 0.09 0.00 6.85 v _11350_/A3 (sky130_fd_sc_hd__a311o_1) |
| 0.10 0.43 7.28 v _11350_/X (sky130_fd_sc_hd__a311o_1) |
| 4 0.01 _05792_ (net) |
| 0.10 0.00 7.28 v _11353_/A3 (sky130_fd_sc_hd__a311o_1) |
| 0.10 0.44 7.72 v _11353_/X (sky130_fd_sc_hd__a311o_1) |
| 4 0.01 _05795_ (net) |
| 0.10 0.00 7.72 v _11356_/A3 (sky130_fd_sc_hd__a311o_1) |
| 0.10 0.45 8.17 v _11356_/X (sky130_fd_sc_hd__a311o_1) |
| 4 0.01 _05798_ (net) |
| 0.10 0.00 8.17 v _11359_/A3 (sky130_fd_sc_hd__a311o_1) |
| 0.11 0.45 8.62 v _11359_/X (sky130_fd_sc_hd__a311o_1) |
| 5 0.01 _05801_ (net) |
| 0.11 0.00 8.62 v _11429_/A3 (sky130_fd_sc_hd__a32o_1) |
| 0.04 0.29 8.91 v _11429_/X (sky130_fd_sc_hd__a32o_1) |
| 1 0.00 _05871_ (net) |
| 0.04 0.00 8.91 v _11478_/A2 (sky130_fd_sc_hd__a221o_1) |
| 0.06 0.36 9.27 v _11478_/X (sky130_fd_sc_hd__a221o_1) |
| 1 0.00 _05920_ (net) |
| 0.06 0.00 9.27 v _11480_/C1 (sky130_fd_sc_hd__a2111o_1) |
| 0.06 0.36 9.63 v _11480_/X (sky130_fd_sc_hd__a2111o_1) |
| 1 0.00 _05922_ (net) |
| 0.06 0.00 9.63 v _11481_/C1 (sky130_fd_sc_hd__a221o_2) |
| 0.11 0.40 10.03 v _11481_/X (sky130_fd_sc_hd__a221o_2) |
| 2 0.03 _05923_ (net) |
| 0.11 0.00 10.03 v _11482_/C_N (sky130_fd_sc_hd__or3b_1) |
| 0.03 0.19 10.22 ^ _11482_/X (sky130_fd_sc_hd__or3b_1) |
| 1 0.00 _05924_ (net) |
| 0.03 0.00 10.22 ^ _11495_/A (sky130_fd_sc_hd__and3_2) |
| 0.15 0.26 10.48 ^ _11495_/X (sky130_fd_sc_hd__and3_2) |
| 5 0.03 _05937_ (net) |
| 0.15 0.00 10.48 ^ _11548_/A (sky130_fd_sc_hd__nand2_1) |
| 0.08 0.10 10.58 v _11548_/Y (sky130_fd_sc_hd__nand2_1) |
| 3 0.01 _05985_ (net) |
| 0.08 0.00 10.58 v _11641_/A (sky130_fd_sc_hd__dlymetal6s2s_1) |
| 0.10 0.21 10.80 v _11641_/X (sky130_fd_sc_hd__dlymetal6s2s_1) |
| 5 0.02 _06074_ (net) |
| 0.10 0.00 10.80 v _11642_/A (sky130_fd_sc_hd__buf_2) |
| 0.07 0.20 10.99 v _11642_/X (sky130_fd_sc_hd__buf_2) |
| 5 0.03 _06075_ (net) |
| 0.07 0.00 10.99 v _11643_/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.07 0.16 11.15 v _11643_/X (sky130_fd_sc_hd__clkbuf_2) |
| 5 0.02 _06076_ (net) |
| 0.07 0.00 11.15 v _12229_/A (sky130_fd_sc_hd__or3_1) |
| 0.08 0.41 11.56 v _12229_/X (sky130_fd_sc_hd__or3_1) |
| 1 0.00 _06622_ (net) |
| 0.08 0.00 11.56 v _12232_/A3 (sky130_fd_sc_hd__a31o_1) |
| 0.08 0.28 11.84 v _12232_/X (sky130_fd_sc_hd__a31o_1) |
| 2 0.01 _06625_ (net) |
| 0.08 0.00 11.85 v _12237_/A1_N (sky130_fd_sc_hd__o2bb2a_2) |
| 0.18 0.38 12.23 ^ _12237_/X (sky130_fd_sc_hd__o2bb2a_2) |
| 1 0.03 net156 (net) |
| 0.18 0.00 12.23 ^ output156/A (sky130_fd_sc_hd__buf_2) |
| 0.18 0.26 12.49 ^ output156/X (sky130_fd_sc_hd__buf_2) |
| 1 0.03 io_ibus_addr[22] (net) |
| 0.18 0.00 12.49 ^ io_ibus_addr[22] (out) |
| 12.49 data arrival time |
| |
| 20.00 20.00 clock clock (rise edge) |
| 0.00 20.00 clock network delay (propagated) |
| -0.25 19.75 clock uncertainty |
| 0.00 19.75 clock reconvergence pessimism |
| -4.00 15.75 output external delay |
| 15.75 data required time |
| ----------------------------------------------------------------------------- |
| 15.75 data required time |
| -12.49 data arrival time |
| ----------------------------------------------------------------------------- |
| 3.26 slack (MET) |
| |
| |
| Startpoint: _19838_ (rising edge-triggered flip-flop clocked by clock) |
| Endpoint: io_ibus_addr[28] (output port clocked by clock) |
| Path Group: clock |
| Path Type: max |
| |
| Fanout Cap Slew Delay Time Description |
| ----------------------------------------------------------------------------- |
| 0.00 0.00 clock clock (rise edge) |
| 0.00 0.00 clock source latency |
| 0.28 0.21 0.21 ^ clock (in) |
| 1 0.06 clock (net) |
| 0.28 0.00 0.21 ^ clkbuf_0_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.05 0.21 0.43 ^ clkbuf_0_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 2 0.02 clknet_0_clock (net) |
| 0.05 0.00 0.43 ^ clkbuf_1_1_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.05 0.11 0.54 ^ clkbuf_1_1_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 1 0.01 clknet_1_1_0_clock (net) |
| 0.05 0.00 0.54 ^ clkbuf_1_1_1_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.12 0.17 0.70 ^ clkbuf_1_1_1_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_1_1_1_clock (net) |
| 0.12 0.00 0.70 ^ clkbuf_2_3_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.18 0.24 0.94 ^ clkbuf_2_3_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.03 clknet_2_3_0_clock (net) |
| 0.18 0.00 0.94 ^ clkbuf_3_7_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.12 0.21 1.16 ^ clkbuf_3_7_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_3_7_0_clock (net) |
| 0.12 0.00 1.16 ^ clkbuf_4_14_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.92 0.77 1.93 ^ clkbuf_4_14_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 13 0.17 clknet_4_14_0_clock (net) |
| 0.92 0.00 1.93 ^ clkbuf_leaf_116_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.07 0.31 2.24 ^ clkbuf_leaf_116_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 7 0.02 clknet_leaf_116_clock (net) |
| 0.07 0.00 2.24 ^ _19838_/CLK (sky130_fd_sc_hd__dfxtp_1) |
| 0.04 0.32 2.56 v _19838_/Q (sky130_fd_sc_hd__dfxtp_1) |
| 2 0.01 ctrl._T_135[3] (net) |
| 0.04 0.00 2.56 v _09078_/A (sky130_fd_sc_hd__or4bb_2) |
| 0.14 0.73 3.29 v _09078_/X (sky130_fd_sc_hd__or4bb_2) |
| 2 0.02 _03527_ (net) |
| 0.14 0.00 3.30 v _09079_/A (sky130_fd_sc_hd__dlymetal6s2s_1) |
| 0.09 0.24 3.53 v _09079_/X (sky130_fd_sc_hd__dlymetal6s2s_1) |
| 5 0.02 _03528_ (net) |
| 0.09 0.00 3.53 v _09180_/B (sky130_fd_sc_hd__or4_2) |
| 0.14 0.75 4.28 v _09180_/X (sky130_fd_sc_hd__or4_2) |
| 3 0.01 _03623_ (net) |
| 0.14 0.00 4.28 v _09181_/B (sky130_fd_sc_hd__and2b_1) |
| 0.05 0.23 4.51 v _09181_/X (sky130_fd_sc_hd__and2b_1) |
| 3 0.01 _03624_ (net) |
| 0.05 0.00 4.51 v _11505_/B (sky130_fd_sc_hd__and2b_2) |
| 0.08 0.26 4.77 v _11505_/X (sky130_fd_sc_hd__and2b_2) |
| 5 0.02 _05945_ (net) |
| 0.08 0.00 4.77 v _11673_/S (sky130_fd_sc_hd__mux2_1) |
| 0.06 0.34 5.11 v _11673_/X (sky130_fd_sc_hd__mux2_1) |
| 1 0.00 _06105_ (net) |
| 0.06 0.00 5.11 v _11674_/A2 (sky130_fd_sc_hd__a21o_2) |
| 0.09 0.29 5.40 v _11674_/X (sky130_fd_sc_hd__a21o_2) |
| 2 0.03 _06106_ (net) |
| 0.09 0.00 5.40 v _11715_/B1 (sky130_fd_sc_hd__o21ai_2) |
| 0.20 0.12 5.52 ^ _11715_/Y (sky130_fd_sc_hd__o21ai_2) |
| 3 0.01 _06145_ (net) |
| 0.20 0.00 5.52 ^ _11716_/C (sky130_fd_sc_hd__and4b_1) |
| 0.11 0.27 5.79 ^ _11716_/X (sky130_fd_sc_hd__and4b_1) |
| 2 0.01 _06146_ (net) |
| 0.11 0.00 5.79 ^ _11717_/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.15 0.21 6.01 ^ _11717_/X (sky130_fd_sc_hd__clkbuf_2) |
| 5 0.03 _06147_ (net) |
| 0.15 0.00 6.01 ^ _11842_/A (sky130_fd_sc_hd__nand4_4) |
| 0.14 0.15 6.16 v _11842_/Y (sky130_fd_sc_hd__nand4_4) |
| 5 0.02 _06264_ (net) |
| 0.14 0.00 6.16 v _11950_/A (sky130_fd_sc_hd__or4_2) |
| 0.14 0.78 6.95 v _11950_/X (sky130_fd_sc_hd__or4_2) |
| 4 0.01 _06364_ (net) |
| 0.14 0.00 6.95 v _12025_/B (sky130_fd_sc_hd__or4_2) |
| 0.14 0.76 7.71 v _12025_/X (sky130_fd_sc_hd__or4_2) |
| 4 0.01 _06433_ (net) |
| 0.14 0.00 7.71 v _12140_/B (sky130_fd_sc_hd__nor4_1) |
| 0.48 0.50 8.21 ^ _12140_/Y (sky130_fd_sc_hd__nor4_1) |
| 2 0.01 _06540_ (net) |
| 0.48 0.00 8.21 ^ _12163_/A2 (sky130_fd_sc_hd__a21oi_2) |
| 0.11 0.16 8.37 v _12163_/Y (sky130_fd_sc_hd__a21oi_2) |
| 3 0.01 _06561_ (net) |
| 0.11 0.00 8.37 v _12212_/A2 (sky130_fd_sc_hd__o31a_1) |
| 0.06 0.32 8.69 v _12212_/X (sky130_fd_sc_hd__o31a_1) |
| 2 0.00 _06606_ (net) |
| 0.06 0.00 8.69 v _12213_/B (sky130_fd_sc_hd__nor2_1) |
| 0.17 0.16 8.85 ^ _12213_/Y (sky130_fd_sc_hd__nor2_1) |
| 3 0.01 _06607_ (net) |
| 0.17 0.00 8.85 ^ _12262_/A1 (sky130_fd_sc_hd__a21o_2) |
| 0.11 0.22 9.07 ^ _12262_/X (sky130_fd_sc_hd__a21o_2) |
| 2 0.02 _06652_ (net) |
| 0.11 0.00 9.07 ^ _12282_/B1_N (sky130_fd_sc_hd__a21boi_1) |
| 0.20 0.24 9.31 ^ _12282_/Y (sky130_fd_sc_hd__a21boi_1) |
| 2 0.01 _06670_ (net) |
| 0.20 0.00 9.31 ^ _12306_/B1_N (sky130_fd_sc_hd__a21bo_1) |
| 0.06 0.27 9.59 v _12306_/X (sky130_fd_sc_hd__a21bo_1) |
| 2 0.01 _06692_ (net) |
| 0.06 0.00 9.59 v _12331_/B1 (sky130_fd_sc_hd__a21oi_2) |
| 0.26 0.24 9.83 ^ _12331_/Y (sky130_fd_sc_hd__a21oi_2) |
| 2 0.02 _06715_ (net) |
| 0.26 0.00 9.83 ^ _12332_/B (sky130_fd_sc_hd__xnor2_4) |
| 0.25 0.20 10.03 ^ _12332_/Y (sky130_fd_sc_hd__xnor2_4) |
| 3 0.03 _06716_ (net) |
| 0.25 0.00 10.03 ^ _12334_/A (sky130_fd_sc_hd__xor2_4) |
| 0.20 0.25 10.28 ^ _12334_/X (sky130_fd_sc_hd__xor2_4) |
| 2 0.02 _06718_ (net) |
| 0.20 0.00 10.28 ^ _12347_/B (sky130_fd_sc_hd__nand2_1) |
| 0.06 0.10 10.38 v _12347_/Y (sky130_fd_sc_hd__nand2_1) |
| 2 0.00 _06729_ (net) |
| 0.06 0.00 10.38 v _12348_/B (sky130_fd_sc_hd__or4bb_1) |
| 0.10 0.53 10.91 v _12348_/X (sky130_fd_sc_hd__or4bb_1) |
| 2 0.01 _06730_ (net) |
| 0.10 0.00 10.91 v _12363_/A (sky130_fd_sc_hd__nand3_1) |
| 0.06 0.09 11.00 ^ _12363_/Y (sky130_fd_sc_hd__nand3_1) |
| 1 0.00 _06745_ (net) |
| 0.06 0.00 11.00 ^ _12364_/B (sky130_fd_sc_hd__and2_1) |
| 0.06 0.14 11.14 ^ _12364_/X (sky130_fd_sc_hd__and2_1) |
| 1 0.00 _06746_ (net) |
| 0.06 0.00 11.14 ^ _12365_/A (sky130_fd_sc_hd__buf_4) |
| 0.14 0.20 11.34 ^ _12365_/X (sky130_fd_sc_hd__buf_4) |
| 3 0.05 net91 (net) |
| 0.14 0.00 11.34 ^ _12369_/B (sky130_fd_sc_hd__nand2_1) |
| 0.06 0.09 11.43 v _12369_/Y (sky130_fd_sc_hd__nand2_1) |
| 1 0.00 _06750_ (net) |
| 0.06 0.00 11.43 v _12374_/A2 (sky130_fd_sc_hd__a31o_1) |
| 0.07 0.25 11.68 v _12374_/X (sky130_fd_sc_hd__a31o_1) |
| 1 0.01 _06755_ (net) |
| 0.07 0.00 11.68 v _12375_/C1 (sky130_fd_sc_hd__o311a_1) |
| 0.10 0.17 11.85 v _12375_/X (sky130_fd_sc_hd__o311a_1) |
| 2 0.01 _06756_ (net) |
| 0.10 0.00 11.85 v _12376_/B1 (sky130_fd_sc_hd__a21oi_4) |
| 0.28 0.28 12.13 ^ _12376_/Y (sky130_fd_sc_hd__a21oi_4) |
| 1 0.04 net162 (net) |
| 0.28 0.00 12.14 ^ output162/A (sky130_fd_sc_hd__buf_2) |
| 0.17 0.28 12.42 ^ output162/X (sky130_fd_sc_hd__buf_2) |
| 1 0.03 io_ibus_addr[28] (net) |
| 0.17 0.00 12.42 ^ io_ibus_addr[28] (out) |
| 12.42 data arrival time |
| |
| 20.00 20.00 clock clock (rise edge) |
| 0.00 20.00 clock network delay (propagated) |
| -0.25 19.75 clock uncertainty |
| 0.00 19.75 clock reconvergence pessimism |
| -4.00 15.75 output external delay |
| 15.75 data required time |
| ----------------------------------------------------------------------------- |
| 15.75 data required time |
| -12.42 data arrival time |
| ----------------------------------------------------------------------------- |
| 3.33 slack (MET) |
| |
| |
| max_report_end |
| check_report |
| |
| =========================================================================== |
| report_checks -unconstrained |
| ============================================================================ |
| Startpoint: _19838_ (rising edge-triggered flip-flop clocked by clock) |
| Endpoint: io_ibus_addr[31] (output port clocked by clock) |
| Path Group: clock |
| Path Type: max |
| |
| Fanout Cap Slew Delay Time Description |
| ----------------------------------------------------------------------------- |
| 0.00 0.00 clock clock (rise edge) |
| 0.00 0.00 clock source latency |
| 0.28 0.21 0.21 ^ clock (in) |
| 1 0.06 clock (net) |
| 0.28 0.00 0.21 ^ clkbuf_0_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.05 0.21 0.43 ^ clkbuf_0_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 2 0.02 clknet_0_clock (net) |
| 0.05 0.00 0.43 ^ clkbuf_1_1_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.05 0.11 0.54 ^ clkbuf_1_1_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 1 0.01 clknet_1_1_0_clock (net) |
| 0.05 0.00 0.54 ^ clkbuf_1_1_1_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.12 0.17 0.70 ^ clkbuf_1_1_1_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_1_1_1_clock (net) |
| 0.12 0.00 0.70 ^ clkbuf_2_3_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.18 0.24 0.94 ^ clkbuf_2_3_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.03 clknet_2_3_0_clock (net) |
| 0.18 0.00 0.94 ^ clkbuf_3_7_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.12 0.21 1.16 ^ clkbuf_3_7_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 2 0.02 clknet_3_7_0_clock (net) |
| 0.12 0.00 1.16 ^ clkbuf_4_14_0_clock/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.92 0.77 1.93 ^ clkbuf_4_14_0_clock/X (sky130_fd_sc_hd__clkbuf_2) |
| 13 0.17 clknet_4_14_0_clock (net) |
| 0.92 0.00 1.93 ^ clkbuf_leaf_116_clock/A (sky130_fd_sc_hd__clkbuf_16) |
| 0.07 0.31 2.24 ^ clkbuf_leaf_116_clock/X (sky130_fd_sc_hd__clkbuf_16) |
| 7 0.02 clknet_leaf_116_clock (net) |
| 0.07 0.00 2.24 ^ _19838_/CLK (sky130_fd_sc_hd__dfxtp_1) |
| 0.04 0.32 2.56 v _19838_/Q (sky130_fd_sc_hd__dfxtp_1) |
| 2 0.01 ctrl._T_135[3] (net) |
| 0.04 0.00 2.56 v _09078_/A (sky130_fd_sc_hd__or4bb_2) |
| 0.14 0.73 3.29 v _09078_/X (sky130_fd_sc_hd__or4bb_2) |
| 2 0.02 _03527_ (net) |
| 0.14 0.00 3.30 v _09079_/A (sky130_fd_sc_hd__dlymetal6s2s_1) |
| 0.09 0.24 3.53 v _09079_/X (sky130_fd_sc_hd__dlymetal6s2s_1) |
| 5 0.02 _03528_ (net) |
| 0.09 0.00 3.53 v _09180_/B (sky130_fd_sc_hd__or4_2) |
| 0.14 0.75 4.28 v _09180_/X (sky130_fd_sc_hd__or4_2) |
| 3 0.01 _03623_ (net) |
| 0.14 0.00 4.28 v _09181_/B (sky130_fd_sc_hd__and2b_1) |
| 0.05 0.23 4.51 v _09181_/X (sky130_fd_sc_hd__and2b_1) |
| 3 0.01 _03624_ (net) |
| 0.05 0.00 4.51 v _11505_/B (sky130_fd_sc_hd__and2b_2) |
| 0.08 0.26 4.77 v _11505_/X (sky130_fd_sc_hd__and2b_2) |
| 5 0.02 _05945_ (net) |
| 0.08 0.00 4.77 v _11673_/S (sky130_fd_sc_hd__mux2_1) |
| 0.06 0.34 5.11 v _11673_/X (sky130_fd_sc_hd__mux2_1) |
| 1 0.00 _06105_ (net) |
| 0.06 0.00 5.11 v _11674_/A2 (sky130_fd_sc_hd__a21o_2) |
| 0.09 0.29 5.40 v _11674_/X (sky130_fd_sc_hd__a21o_2) |
| 2 0.03 _06106_ (net) |
| 0.09 0.00 5.40 v _11715_/B1 (sky130_fd_sc_hd__o21ai_2) |
| 0.20 0.12 5.52 ^ _11715_/Y (sky130_fd_sc_hd__o21ai_2) |
| 3 0.01 _06145_ (net) |
| 0.20 0.00 5.52 ^ _11716_/C (sky130_fd_sc_hd__and4b_1) |
| 0.11 0.27 5.79 ^ _11716_/X (sky130_fd_sc_hd__and4b_1) |
| 2 0.01 _06146_ (net) |
| 0.11 0.00 5.79 ^ _11717_/A (sky130_fd_sc_hd__clkbuf_2) |
| 0.15 0.21 6.01 ^ _11717_/X (sky130_fd_sc_hd__clkbuf_2) |
| 5 0.03 _06147_ (net) |
| 0.15 0.00 6.01 ^ _11842_/A (sky130_fd_sc_hd__nand4_4) |
| 0.14 0.15 6.16 v _11842_/Y (sky130_fd_sc_hd__nand4_4) |
| 5 0.02 _06264_ (net) |
| 0.14 0.00 6.16 v _11950_/A (sky130_fd_sc_hd__or4_2) |
| 0.14 0.78 6.95 v _11950_/X (sky130_fd_sc_hd__or4_2) |
| 4 0.01 _06364_ (net) |
| 0.14 0.00 6.95 v _12025_/B (sky130_fd_sc_hd__or4_2) |
| 0.14 0.76 7.71 v _12025_/X (sky130_fd_sc_hd__or4_2) |
| 4 0.01 _06433_ (net) |
| 0.14 0.00 7.71 v _12140_/B (sky130_fd_sc_hd__nor4_1) |
| 0.48 0.50 8.21 ^ _12140_/Y (sky130_fd_sc_hd__nor4_1) |
| 2 0.01 _06540_ (net) |
| 0.48 0.00 8.21 ^ _12163_/A2 (sky130_fd_sc_hd__a21oi_2) |
| 0.11 0.16 8.37 v _12163_/Y (sky130_fd_sc_hd__a21oi_2) |
| 3 0.01 _06561_ (net) |
| 0.11 0.00 8.37 v _12212_/A2 (sky130_fd_sc_hd__o31a_1) |
| 0.06 0.32 8.69 v _12212_/X (sky130_fd_sc_hd__o31a_1) |
| 2 0.00 _06606_ (net) |
| 0.06 0.00 8.69 v _12213_/B (sky130_fd_sc_hd__nor2_1) |
| 0.17 0.16 8.85 ^ _12213_/Y (sky130_fd_sc_hd__nor2_1) |
| 3 0.01 _06607_ (net) |
| 0.17 0.00 8.85 ^ _12262_/A1 (sky130_fd_sc_hd__a21o_2) |
| 0.11 0.22 9.07 ^ _12262_/X (sky130_fd_sc_hd__a21o_2) |
| 2 0.02 _06652_ (net) |
| 0.11 0.00 9.07 ^ _12282_/B1_N (sky130_fd_sc_hd__a21boi_1) |
| 0.20 0.24 9.31 ^ _12282_/Y (sky130_fd_sc_hd__a21boi_1) |
| 2 0.01 _06670_ (net) |
| 0.20 0.00 9.31 ^ _12306_/B1_N (sky130_fd_sc_hd__a21bo_1) |
| 0.06 0.27 9.59 v _12306_/X (sky130_fd_sc_hd__a21bo_1) |
| 2 0.01 _06692_ (net) |
| 0.06 0.00 9.59 v _12331_/B1 (sky130_fd_sc_hd__a21oi_2) |
| 0.26 0.24 9.83 ^ _12331_/Y (sky130_fd_sc_hd__a21oi_2) |
| 2 0.02 _06715_ (net) |
| 0.26 0.00 9.83 ^ _12332_/B (sky130_fd_sc_hd__xnor2_4) |
| 0.25 0.20 10.03 ^ _12332_/Y (sky130_fd_sc_hd__xnor2_4) |
| 3 0.03 _06716_ (net) |
| 0.25 0.00 10.03 ^ _12334_/A (sky130_fd_sc_hd__xor2_4) |
| 0.20 0.25 10.28 ^ _12334_/X (sky130_fd_sc_hd__xor2_4) |
| 2 0.02 _06718_ (net) |
| 0.20 0.00 10.28 ^ _12347_/B (sky130_fd_sc_hd__nand2_1) |
| 0.06 0.10 10.38 v _12347_/Y (sky130_fd_sc_hd__nand2_1) |
| 2 0.00 _06729_ (net) |
| 0.06 0.00 10.38 v _12348_/B (sky130_fd_sc_hd__or4bb_1) |
| 0.10 0.53 10.91 v _12348_/X (sky130_fd_sc_hd__or4bb_1) |
| 2 0.01 _06730_ (net) |
| 0.10 0.00 10.91 v _12362_/A1 (sky130_fd_sc_hd__a21o_1) |
| 0.08 0.23 11.14 v _12362_/X (sky130_fd_sc_hd__a21o_1) |
| 4 0.02 _06744_ (net) |
| 0.08 0.00 11.14 v _12420_/A2 (sky130_fd_sc_hd__a311o_1) |
| 0.10 0.40 11.54 v _12420_/X (sky130_fd_sc_hd__a311o_1) |
| 2 0.01 _06796_ (net) |
| 0.10 0.00 11.54 v _12431_/A2 (sky130_fd_sc_hd__a21o_2) |
| 0.10 0.32 11.86 v _12431_/X (sky130_fd_sc_hd__a21o_2) |
| 3 0.03 _06807_ (net) |
| 0.10 0.00 11.86 v _12433_/A2 (sky130_fd_sc_hd__a21boi_2) |
| 0.24 0.28 12.14 ^ _12433_/Y (sky130_fd_sc_hd__a21boi_2) |
| 1 0.02 _06808_ (net) |
| 0.24 0.00 12.14 ^ _12437_/A2 (sky130_fd_sc_hd__o31a_1) |
| 0.16 0.26 12.41 ^ _12437_/X (sky130_fd_sc_hd__o31a_1) |
| 2 0.01 _06812_ (net) |
| 0.16 0.00 12.41 ^ _12441_/B1 (sky130_fd_sc_hd__o22a_4) |
| 0.12 0.24 12.64 ^ _12441_/X (sky130_fd_sc_hd__o22a_4) |
| 1 0.04 net166 (net) |
| 0.12 0.00 12.65 ^ output166/A (sky130_fd_sc_hd__buf_2) |
| 0.18 0.25 12.90 ^ output166/X (sky130_fd_sc_hd__buf_2) |
| 1 0.03 io_ibus_addr[31] (net) |
| 0.18 0.00 12.90 ^ io_ibus_addr[31] (out) |
| 12.90 data arrival time |
| |
| 20.00 20.00 clock clock (rise edge) |
| 0.00 20.00 clock network delay (propagated) |
| -0.25 19.75 clock uncertainty |
| 0.00 19.75 clock reconvergence pessimism |
| -4.00 15.75 output external delay |
| 15.75 data required time |
| ----------------------------------------------------------------------------- |
| 15.75 data required time |
| -12.90 data arrival time |
| ----------------------------------------------------------------------------- |
| 2.85 slack (MET) |
| |
| |
| |
| =========================================================================== |
| report_checks --slack_max -0.01 |
| ============================================================================ |
| No paths found. |
| check_report_end |
| check_slew |
| |
| =========================================================================== |
| report_check_types -max_slew -max_cap -max_fanout -violators |
| ============================================================================ |
| |
| =========================================================================== |
| max slew violation count 0 |
| max fanout violation count 0 |
| max cap violation count 0 |
| ============================================================================ |
| check_slew_end |
| tns_report |
| |
| =========================================================================== |
| report_tns |
| ============================================================================ |
| tns 0.00 |
| tns_report_end |
| wns_report |
| |
| =========================================================================== |
| report_wns |
| ============================================================================ |
| wns 0.00 |
| wns_report_end |
| worst_slack |
| |
| =========================================================================== |
| report_worst_slack -max (Setup) |
| ============================================================================ |
| worst slack 2.85 |
| |
| =========================================================================== |
| report_worst_slack -min (Hold) |
| ============================================================================ |
| worst slack 0.01 |
| worst_slack_end |
| clock_skew |
| |
| =========================================================================== |
| report_clock_skew |
| ============================================================================ |
| Clock clock |
| Latency CRPR Skew |
| _19447_/CLK ^ |
| 2.42 |
| _19095_/CLK ^ |
| 1.52 -0.04 0.86 |
| |
| clock_skew_end |
| power_report |
| |
| =========================================================================== |
| report_power |
| ============================================================================ |
| Group Internal Switching Leakage Total |
| Power Power Power Power |
| ---------------------------------------------------------------- |
| Sequential 3.51e-03 2.47e-04 1.37e-08 3.76e-03 36.8% |
| Combinational 3.24e-03 3.21e-03 4.13e-08 6.45e-03 63.2% |
| Macro 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% |
| Pad 0.00e+00 0.00e+00 0.00e+00 0.00e+00 0.0% |
| ---------------------------------------------------------------- |
| Total 6.75e-03 3.46e-03 5.49e-08 1.02e-02 100.0% |
| 66.1% 33.9% 0.0% |
| power_report_end |
| area_report |
| |
| =========================================================================== |
| report_design_area |
| ============================================================================ |
| Design area 123171 u^2 53% utilization. |
| area_report_end |
