update 4ft4_fib testing & enable gatelevel run

update includes.gl.caravel_user_project to enable gatelevel run.

run RTL with WITH_ROM_RESET to match the synthesized design.

make tb run longer because with reset rom the cpu runs through the
full 12bit address space so it takes longer to get to the fib
3 files changed
tree: 3989e597c1882d4b7ff31c216afa1f480e9d9ec4
  1. .github/
  2. def/
  3. docs/
  4. gds/
  5. lef/
  6. mag/
  7. maglef/
  8. openlane/
  9. signoff/
  10. spi/
  11. verilog/
  12. .gitignore
  13. .gitmodules
  15. Makefile
  16. README.md

Caravel 4ft4

4ft4 is a clone of the MCS-4 architecture (4004 CPU, 4001 ROM, 4002 RAM), with a wishbone backdoor interface to the “ROM” and the RAM that enables loading a program for execution and inspecting/modifying the RAM.

This is an integration of 4ft4 into the caravel harness, with the 4ft4 wishbone backdoor interface connected to the caravel management processor.

License information

caravel_user_project and modifications: Apache 2.0. The original caravel_user_project that this is based on is https://github.com/efabless/caravel_user_project.

4ft4: MIT.