blob: 5a7eac14f19f3e2a5d922688fe0cf51cfb8e03bc [file] [log] [blame]
Project Chip ID is: 348132
Setting Project Chip ID to: 00054fe4
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!