Fixed GDS.
diff --git a/def/user_project_wrapper.def.gz b/def/user_project_wrapper.def.gz index eb62f3e..1754846 100644 --- a/def/user_project_wrapper.def.gz +++ b/def/user_project_wrapper.def.gz Binary files differ
diff --git a/gds/user_project_wrapper.gds.gz b/gds/user_project_wrapper.gds.gz index 9d8dc9e..7e6022f 100644 --- a/gds/user_project_wrapper.gds.gz +++ b/gds/user_project_wrapper.gds.gz Binary files differ
diff --git a/lef/user_project_wrapper.lef.gz b/lef/user_project_wrapper.lef.gz index 2b86d08..8932c2e 100644 --- a/lef/user_project_wrapper.lef.gz +++ b/lef/user_project_wrapper.lef.gz Binary files differ
diff --git a/mag/user_project_wrapper.mag.gz b/mag/user_project_wrapper.mag.gz index 3bc2dae..c69b76f 100644 --- a/mag/user_project_wrapper.mag.gz +++ b/mag/user_project_wrapper.mag.gz Binary files differ
diff --git a/maglef/user_project_wrapper.mag.gz b/maglef/user_project_wrapper.mag.gz index 68be77f..7b2afc6 100644 --- a/maglef/user_project_wrapper.mag.gz +++ b/maglef/user_project_wrapper.mag.gz Binary files differ
diff --git a/openlane/user_project_wrapper/config.tcl b/openlane/user_project_wrapper/config.tcl index 02ec4a6..c076e7c 100755 --- a/openlane/user_project_wrapper/config.tcl +++ b/openlane/user_project_wrapper/config.tcl
@@ -57,17 +57,14 @@ $::env(CARAVEL_ROOT)/verilog/rtl/defines.v \ $script_dir/../../verilog/rtl/user_proj_dac.v \ $script_dir/../../verilog/rtl/audiodac_drv.v" -# $script_dir/../../verilog/rtl/jku_logo.v" set ::env(EXTRA_LEFS) "\ $script_dir/../../lef/user_proj_dac.lef \ $script_dir/../../lef/audiodac_drv.lef" -# $script_dir/../../lef/jku_logo.lef" set ::env(EXTRA_GDS_FILES) "\ - $script_dir/../../gds/uder_proj_dac.gds \ + $script_dir/../../gds/user_proj_dac.gds \ $script_dir/../../gds/audiodac_drv.gds" -# $script_dir/../../gds/jku_logo.gds" set ::env(GLB_RT_MAXLAYER) 5
diff --git a/signoff/user_project_wrapper/final_summary_report.csv b/signoff/user_project_wrapper/final_summary_report.csv index 68426ee..d1362b0 100644 --- a/signoff/user_project_wrapper/final_summary_report.csv +++ b/signoff/user_project_wrapper/final_summary_report.csv
@@ -1,2 +1,2 @@ ,design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,suggested_clock_frequency,suggested_clock_period,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GLB_RT_ADJUSTMENT,STD_CELL_LIBRARY,CELL_PAD,DIODE_INSERTION_STRATEGY -0,/home/harald/caravel_mpw5/iic-audiodac-v1/openlane/user_project_wrapper,user_project_wrapper,user_project_wrapper,flow_completed,0h3m24s,-1,0.38916562889165623,10.2784,0.19458281444582812,-1,547.55,2,0,0,0,0,0,0,0,0,0,-1,-1,779974,2311,0.0,-1,-1,0.0,-1,0.0,-1,-1,0.0,-1,-1,40141.04,1.74,2.91,0.44,0.0,-1,27,645,27,645,0,0,0,2,0,0,0,0,0,0,0,0,-1,-1,-1,0,0,0,0,19.607843137254903,51,50,AREA 0,5,50,1,180,180,0.55,0.0,sky130_fd_sc_hd,4,0 +0,/home/harald/caravel_mpw5/iic-audiodac-v1/openlane/user_project_wrapper,user_project_wrapper,user_project_wrapper,flow_completed,0h40m32s,-1,0.38916562889165623,10.2784,0.19458281444582812,-1,548.68,2,0,0,0,0,0,0,0,0,0,-1,-1,779974,2311,0.0,-1,-1,0.0,-1,0.0,-1,-1,0.0,-1,-1,40141.04,1.74,2.91,0.44,0.0,-1,27,645,27,645,0,0,0,2,0,0,0,0,0,0,0,0,-1,-1,-1,0,0,0,0,19.607843137254903,51,50,AREA 0,5,50,1,180,180,0.55,0.0,sky130_fd_sc_hd,4,0
diff --git a/spi/lvs/user_project_wrapper.spice.gz b/spi/lvs/user_project_wrapper.spice.gz index 03e25c4..2e8f4ef 100644 --- a/spi/lvs/user_project_wrapper.spice.gz +++ b/spi/lvs/user_project_wrapper.spice.gz Binary files differ
diff --git a/verilog/gl/user_project_wrapper.v.gz b/verilog/gl/user_project_wrapper.v.gz index b6c04b0..350d400 100644 --- a/verilog/gl/user_project_wrapper.v.gz +++ b/verilog/gl/user_project_wrapper.v.gz Binary files differ