Fixed minor problem with gds
diff --git a/gds/flash_array_8x8.gds b/gds/flash_array_8x8.gds index 2c9af1a..d699351 100644 --- a/gds/flash_array_8x8.gds +++ b/gds/flash_array_8x8.gds Binary files differ
diff --git a/gds/user_project_wrapper.gds b/gds/user_project_wrapper.gds index 4a8aeda..1294ec0 100644 --- a/gds/user_project_wrapper.gds +++ b/gds/user_project_wrapper.gds Binary files differ
diff --git a/lef/flash_array_8x8.lef b/lef/flash_array_8x8.lef index 180eada..afb3d0b 100644 --- a/lef/flash_array_8x8.lef +++ b/lef/flash_array_8x8.lef
@@ -318,7 +318,7 @@ END END BL[0] PIN VBPW - ANTENNADIFFAREA 8.913650 ; + ANTENNADIFFAREA 8.916200 ; PORT LAYER li1 ; RECT 74.090 -1.730 81.670 -1.560 ; @@ -330,7 +330,7 @@ RECT 81.340 -7.020 81.670 -6.850 ; RECT 74.090 -7.450 74.420 -7.280 ; RECT 81.340 -7.880 81.670 -7.710 ; - RECT 74.105 -9.410 81.670 -9.240 ; + RECT 74.090 -9.410 81.670 -9.240 ; LAYER mcon ; RECT 74.170 -1.730 74.340 -1.560 ; RECT 81.420 -1.730 81.590 -1.560 ; @@ -342,7 +342,7 @@ RECT 81.420 -7.020 81.590 -6.850 ; RECT 74.170 -7.450 74.340 -7.280 ; RECT 81.420 -7.880 81.590 -7.710 ; - RECT 74.185 -9.410 74.355 -9.240 ; + RECT 74.170 -9.410 74.340 -9.240 ; RECT 81.420 -9.410 81.590 -9.240 ; LAYER met1 ; RECT 74.110 -1.760 74.400 -1.530 ; @@ -361,12 +361,11 @@ RECT 81.420 -6.820 81.590 -4.150 ; RECT 81.390 -7.050 81.620 -6.820 ; RECT 74.140 -7.480 74.370 -7.250 ; - RECT 74.170 -8.010 74.340 -7.480 ; + RECT 74.170 -9.210 74.340 -7.480 ; RECT 81.420 -7.680 81.590 -7.050 ; RECT 81.390 -7.910 81.620 -7.680 ; - RECT 74.185 -9.210 74.355 -8.010 ; RECT 81.420 -9.210 81.590 -7.910 ; - RECT 74.125 -9.440 74.415 -9.210 ; + RECT 74.110 -9.440 74.400 -9.210 ; RECT 81.360 -9.440 81.650 -9.210 ; END END VBPW @@ -642,7 +641,7 @@ USE POWER ; PORT LAYER nwell ; - RECT 74.840 -19.565 80.945 -16.815 ; + RECT 74.825 -19.565 80.945 -16.815 ; LAYER li1 ; RECT 75.640 -18.105 75.810 -17.010 ; RECT 77.080 -18.105 77.250 -17.010 ; @@ -809,11 +808,9 @@ OBS LAYER nwell ; RECT 72.490 -1.430 83.280 0.000 ; - RECT 72.490 -8.010 73.920 -1.430 ; - RECT 72.505 -8.140 73.920 -8.010 ; - RECT 72.505 -9.540 73.935 -8.140 ; + RECT 72.490 -9.540 73.920 -1.430 ; RECT 81.850 -9.540 83.280 -1.430 ; - RECT 72.505 -10.970 83.280 -9.540 ; + RECT 72.490 -10.970 83.280 -9.540 ; LAYER li1 ; RECT 75.570 -0.350 75.900 -0.180 ; RECT 77.010 -0.350 77.340 -0.180 ;
diff --git a/mag/user_project_wrapper.mag b/mag/user_project_wrapper.mag index b81c9e6..a0e7051 100644 --- a/mag/user_project_wrapper.mag +++ b/mag/user_project_wrapper.mag
@@ -1,7 +1,7 @@ magic tech sky130A magscale 1 2 -timestamp 1644953978 +timestamp 1645038762 << locali >> rect 260849 439875 260883 440113 rect 260757 439841 260883 439875 @@ -53213,7 +53213,7 @@ rect 592618 -7622 592650 -7386 rect -8726 -7654 592650 -7622 use flash_array_8x8 u_flash_array_8x8 -timestamp 1644953978 +timestamp 1645038762 transform 1 0 246057 0 1 440000 box 7737 -20000 26357 80000 << labels >>
diff --git a/maglef/user_project_wrapper.mag b/maglef/user_project_wrapper.mag index 44f47c0..7372fa3 100644 --- a/maglef/user_project_wrapper.mag +++ b/maglef/user_project_wrapper.mag
@@ -1,7 +1,7 @@ magic tech sky130A magscale 1 2 -timestamp 1644953979 +timestamp 1645038763 << obsli1 >> rect 260481 431953 262723 440215 << obsm1 >>
diff --git a/signoff/user_project_wrapper/final_summary_report.csv b/signoff/user_project_wrapper/final_summary_report.csv index 0669233..90ebde0 100644 --- a/signoff/user_project_wrapper/final_summary_report.csv +++ b/signoff/user_project_wrapper/final_summary_report.csv
@@ -1,2 +1,2 @@ ,design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,suggested_clock_frequency,suggested_clock_period,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GLB_RT_ADJUSTMENT,STD_CELL_LIBRARY,CELL_PAD,DIODE_INSERTION_STRATEGY -0,/project/openlane/user_project_wrapper,user_project_wrapper,user_project_wrapper,flow_completed,0h1m47s,-1,0.19458281444582815,10.2784,0.09729140722291407,-1,452.49,1,0,0,0,0,0,0,2,21,0,-1,-1,89870,160,0.0,-1,-1,0.0,-1,0.0,-1,-1,0.0,-1,-1,40141.04,0.16,0.18,0.0,0.0,-1,29,647,29,647,0,0,0,1,0,0,0,0,0,0,0,0,-1,-1,-1,0,0,0,0,90.9090909090909,11.0,10.0,AREA 0,5,50,1,180,180,0.55,0.0,sky130_fd_sc_hd,4,0 +0,/project/openlane/user_project_wrapper,user_project_wrapper,user_project_wrapper,flow_completed,0h1m48s,-1,0.19458281444582815,10.2784,0.09729140722291407,-1,452.41,1,0,0,0,0,0,0,2,21,0,-1,-1,89870,160,0.0,-1,-1,0.0,-1,0.0,-1,-1,0.0,-1,-1,40141.04,0.16,0.18,0.0,0.0,-1,29,647,29,647,0,0,0,1,0,0,0,0,0,0,0,0,-1,-1,-1,0,0,0,0,90.9090909090909,11.0,10.0,AREA 0,5,50,1,180,180,0.55,0.0,sky130_fd_sc_hd,4,0