tree: 7704bc1429f3066ada8e8f4d04d5b9c67c31f9a7 [path history] [tgz]
  1. .github/
  2. docs/
  3. gds/
  4. mag/
  5. maglef/
  6. mpw_precheck/
  7. signoff/
  8. tapeout/
  9. verilog/
  10. .gitignore
  11. .gitmodules
  12. info.yaml
  13. LICENSE
  14. Makefile
  15. README.md
README.md

Amaranth+Coriolis Test SoC

This is a submission of a test SoC for MPW4 built from https://github.com/ChipFlow/mpw4

It contains:

  • Minerva RV32IM CPU
  • 512 bytes SRAM
  • (Q)SPI flash for code and data memory using spimemio from picosoc
  • HyperRAM for RAM extension using a derivative of litehyperbus
  • 8-bit GPIO
  • UART, timer, and interrupt controller

Built using: