commit	83b81260aaa86f7efbc1691d6c194552f4c77780	[log] [tgz]
author	Rameen Anwar <ramianwer1996@gmail.com>	Fri Mar 18 06:04:38 2022 -0700
committer	Rameen Anwar <ramianwer1996@gmail.com>	Fri Mar 18 06:04:38 2022 -0700
tree	4a6f76cf391697bdc903bc4caccef8946b64e095
parent	65afea9f33a88905cfb4b15d6e7412f2af06bdce [diff]

Added rest of second check-in files

2 files changed

tree: 4a6f76cf391697bdc903bc4caccef8946b64e095

.github/
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docs/
gds/
lef/
mag/
maglef/
openlane/
sdc/
sdf/
signoff/
spef/
spi/
verilog/
.gitignore
LICENSE
Makefile
README.md

README.md

Azadi-III

Azadi is an SoC with a 32-bit RISC-V signal core extended version of ibex we named it “buraq”, it is a 3-stage pipeline core that implements the RV32IMF instruction set architecture, a limited number of peripherals UART, SPI, GPIO, PWM, QSPI and timer.