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foss-eda-tools / third_party / shuttle / sky130 / mpw-005 / slot-021 / 5b92b436c5af98395b6d31b2bf7e1ba2e6d10b38
commit5b92b436c5af98395b6d31b2bf7e1ba2e6d10b38[log] [tgz]
authorRameen Anwar <ramianwer1996@gmail.com>Sat Mar 19 02:00:25 2022 -0700
committerRameen Anwar <ramianwer1996@gmail.com>Sat Mar 19 02:00:25 2022 -0700
tree3d981f54c952d46e283b68d5d99eb064d6321add
parent7b0d0089fd056a2438039f52d9f41b4c52745562 [diff]
Added files after placing filler cells and re run make
7 files changed
tree: 3d981f54c952d46e283b68d5d99eb064d6321add
  1. .github/
  2. def/
  3. docs/
  4. gds/
  5. lef/
  6. mag/
  7. maglef/
  8. openlane/
  9. sdc/
  10. sdf/
  11. signoff/
  12. spef/
  13. spi/
  14. verilog/
  15. .gitignore
  16. LICENSE
  17. Makefile
  18. README.md
README.md

Azadi-III

License UPRJ_CI Caravel Build

Azadi is an SoC with a 32-bit RISC-V signal core extended version of ibex we named it “buraq”, it is a 3-stage pipeline core that implements the RV32IMF instruction set architecture, a limited number of peripherals UART, SPI, GPIO, PWM, QSPI and timer.