translate PD schematics, chip level schematic + symbol
diff --git a/xschem/lownoiseamplifier/cmfb-negfb-revision.sch b/xschem/lownoiseamplifier/cmfb-negfb-revision.sch index 86463d2..94b6fd5 100644 --- a/xschem/lownoiseamplifier/cmfb-negfb-revision.sch +++ b/xschem/lownoiseamplifier/cmfb-negfb-revision.sch
@@ -241,3 +241,16 @@ C {ipin.sym} 980 -440 2 0 {name=in2 lab=in2} C {opin.sym} 360 -470 3 0 {name=out1 lab=out1} C {opin.sym} 760 -470 3 0 {name=out2 lab=out2} +C {code.sym} 840 -170 0 0 {name=sT_MODELS +only_toplevel=true +format="tcleval( @value )" +value="** manual skywater pdks install (with patches applied) +* .lib \\\\$::SKYWATER_MODELS\\\\/models/sky130.lib.spice tt + +** opencircuitdesign pdks install +.lib \\\\$::SKYWATER_MODELS\\\\/sky130.lib.spice tt + +.param mc_mm_switch=0 +.param mc_pr_switch=0 +" +spice_ignore=false}
diff --git a/xschem/powerdetector/balaced-pd.sch b/xschem/powerdetector/balaced-pd.sch index 0d44ffe..cdaffdb 100644 --- a/xschem/powerdetector/balaced-pd.sch +++ b/xschem/powerdetector/balaced-pd.sch
@@ -4,91 +4,91 @@ V {} S {} E {} -N 250 -50 250 -40 { lab=gnd} -N 410 -50 410 -40 { lab=gnd} -N 250 -40 410 -40 { lab=gnd} -N 180 -80 210 -80 { lab=in1} -N 180 -80 180 -60 { lab=in1} -N 450 -80 480 -80 { lab=in2} -N 480 -80 480 -60 { lab=in2} -N 250 -120 250 -110 { lab=#net1} -N 250 -120 410 -120 { lab=#net1} -N 410 -120 410 -110 { lab=#net1} -N 330 -150 330 -120 { lab=#net1} -N 330 -180 330 -150 { lab=#net1} -N 180 -210 290 -210 { lab=#net1} -N 230 -210 230 -160 { lab=#net1} -N 230 -160 230 -150 { lab=#net1} -N 230 -150 330 -150 { lab=#net1} -N 80 -210 180 -210 { lab=#net1} -N 100 -120 100 -110 { lab=#net2} -N -20 -120 100 -120 { lab=#net2} -N -20 -120 -20 -110 { lab=#net2} -N 40 -180 40 -120 { lab=#net2} -N 140 -80 160 -80 { lab=vbias} -N 160 -80 170 -80 { lab=vbias} -N 170 -100 170 -80 { lab=vbias} -N -20 -50 -20 -40 { lab=gnd} -N -20 -40 100 -40 { lab=gnd} -N 100 -50 100 -40 { lab=gnd} -N -100 -80 -60 -80 { lab=#net2} -N -140 -180 -140 -110 { lab=#net3} -N -260 -210 -180 -210 { lab=#net3} -N -220 -210 -220 -150 { lab=#net3} -N -220 -150 -140 -150 { lab=#net3} -N -420 -150 -300 -150 { lab=output} -N -80 -150 -80 -80 { lab=#net2} -N -80 -150 40 -150 { lab=#net2} -N -300 -260 -300 -240 { lab=vdd} -N -300 -280 330 -280 { lab=vdd} -N 330 -260 330 -240 { lab=vdd} -N 40 -260 40 -240 { lab=vdd} -N -140 -260 -140 -240 { lab=vdd} -N 40 -300 40 -280 { lab=vdd} -N 330 -40 330 40 { lab=gnd} -N -140 -50 -140 40 { lab=gnd} -N 40 -40 40 40 { lab=gnd} -N -50 40 -50 60 { lab=gnd} -N 180 -60 180 -40 { lab=in1} -N 480 -60 480 -40 { lab=in2} -N 40 -280 40 -260 { lab=vdd} -N 330 -280 330 -260 { lab=vdd} -N -300 -280 -300 -260 { lab=vdd} -N -140 -280 -140 -260 { lab=vdd} -N 170 -120 170 -100 { lab=vbias} -N -300 -180 -300 -170 { lab=output} -N -140 -210 -120 -210 { lab=vdd} -N -120 -240 -120 -210 { lab=vdd} -N -140 -240 -120 -240 { lab=vdd} -N 330 -210 350 -210 { lab=vdd} -N 350 -240 350 -210 { lab=vdd} -N 330 -240 350 -240 { lab=vdd} -N 20 -210 40 -210 { lab=vdd} -N 20 -240 20 -210 { lab=vdd} -N 20 -240 40 -240 { lab=vdd} -N -320 -210 -300 -210 { lab=vdd} -N -320 -240 -320 -210 { lab=vdd} -N -320 -240 -300 -240 { lab=vdd} -N -160 -50 -140 -50 { lab=gnd} -N -160 -80 -160 -50 { lab=gnd} -N -160 -80 -140 -80 { lab=gnd} -N 80 -50 100 -50 { lab=gnd} -N 80 -80 80 -50 { lab=gnd} -N 80 -80 100 -80 { lab=gnd} -N 390 -50 410 -50 { lab=gnd} -N 390 -80 390 -50 { lab=gnd} -N 390 -80 410 -80 { lab=gnd} -N 250 -50 270 -50 { lab=gnd} -N 270 -80 270 -50 { lab=gnd} -N 250 -80 270 -80 { lab=gnd} -N -20 -50 0 -50 { lab=gnd} -N 0 -80 0 -50 { lab=gnd} -N -20 -80 0 -80 { lab=gnd} -N -300 -170 -300 -150 { +N 770 -180 770 -170 { lab=gnd} +N 930 -180 930 -170 { lab=gnd} +N 770 -170 930 -170 { lab=gnd} +N 700 -210 730 -210 { lab=in1} +N 700 -210 700 -190 { lab=in1} +N 970 -210 1000 -210 { lab=in2} +N 1000 -210 1000 -190 { lab=in2} +N 770 -250 770 -240 { lab=#net1} +N 770 -250 930 -250 { lab=#net1} +N 930 -250 930 -240 { lab=#net1} +N 850 -280 850 -250 { lab=#net1} +N 850 -310 850 -280 { lab=#net1} +N 700 -340 810 -340 { lab=#net1} +N 750 -340 750 -290 { lab=#net1} +N 750 -290 750 -280 { lab=#net1} +N 750 -280 850 -280 { lab=#net1} +N 600 -340 700 -340 { lab=#net1} +N 620 -250 620 -240 { lab=#net2} +N 500 -250 620 -250 { lab=#net2} +N 500 -250 500 -240 { lab=#net2} +N 560 -310 560 -250 { lab=#net2} +N 660 -210 680 -210 { lab=vbias} +N 680 -210 690 -210 { lab=vbias} +N 690 -230 690 -210 { lab=vbias} +N 500 -180 500 -170 { lab=gnd} +N 500 -170 620 -170 { lab=gnd} +N 620 -180 620 -170 { lab=gnd} +N 420 -210 460 -210 { lab=#net2} +N 380 -310 380 -240 { lab=#net3} +N 260 -340 340 -340 { lab=#net3} +N 300 -340 300 -280 { lab=#net3} +N 300 -280 380 -280 { lab=#net3} +N 100 -280 220 -280 { lab=output} +N 440 -280 440 -210 { lab=#net2} +N 440 -280 560 -280 { lab=#net2} +N 220 -390 220 -370 { lab=vdd} +N 220 -410 850 -410 { lab=vdd} +N 850 -390 850 -370 { lab=vdd} +N 560 -390 560 -370 { lab=vdd} +N 380 -390 380 -370 { lab=vdd} +N 560 -430 560 -410 { lab=vdd} +N 850 -170 850 -90 { lab=gnd} +N 380 -180 380 -90 { lab=gnd} +N 560 -170 560 -90 { lab=gnd} +N 470 -90 470 -70 { lab=gnd} +N 700 -190 700 -170 { lab=in1} +N 1000 -190 1000 -170 { lab=in2} +N 560 -410 560 -390 { lab=vdd} +N 850 -410 850 -390 { lab=vdd} +N 220 -410 220 -390 { lab=vdd} +N 380 -410 380 -390 { lab=vdd} +N 690 -250 690 -230 { lab=vbias} +N 220 -310 220 -300 { lab=output} +N 380 -340 400 -340 { lab=vdd} +N 400 -370 400 -340 { lab=vdd} +N 380 -370 400 -370 { lab=vdd} +N 850 -340 870 -340 { lab=vdd} +N 870 -370 870 -340 { lab=vdd} +N 850 -370 870 -370 { lab=vdd} +N 540 -340 560 -340 { lab=vdd} +N 540 -370 540 -340 { lab=vdd} +N 540 -370 560 -370 { lab=vdd} +N 200 -340 220 -340 { lab=vdd} +N 200 -370 200 -340 { lab=vdd} +N 200 -370 220 -370 { lab=vdd} +N 360 -180 380 -180 { lab=gnd} +N 360 -210 360 -180 { lab=gnd} +N 360 -210 380 -210 { lab=gnd} +N 600 -180 620 -180 { lab=gnd} +N 600 -210 600 -180 { lab=gnd} +N 600 -210 620 -210 { lab=gnd} +N 910 -180 930 -180 { lab=gnd} +N 910 -210 910 -180 { lab=gnd} +N 910 -210 930 -210 { lab=gnd} +N 770 -180 790 -180 { lab=gnd} +N 790 -210 790 -180 { lab=gnd} +N 770 -210 790 -210 { lab=gnd} +N 500 -180 520 -180 { lab=gnd} +N 520 -210 520 -180 { lab=gnd} +N 500 -210 520 -210 { lab=gnd} +N 220 -300 220 -280 { lab=output} -N -140 40 330 40 { +N 380 -90 850 -90 { lab=gnd} -C {code.sym} 490 -350 0 0 {name=sT_MODELS +C {code.sym} 1010 -480 0 0 {name=sT_MODELS only_toplevel=true format="tcleval( @value )" value="** manual skywater pdks install (with patches applied) @@ -101,13 +101,13 @@ .param mc_pr_switch=0 " spice_ignore=false} -C {ipin.sym} 40 -300 1 0 {name=pdd lab=vdd} -C {ipin.sym} -50 60 3 0 {name=pnd lab=gnd} -C {opin.sym} -420 -150 2 0 {name=putput lab=output} -C {ipin.sym} 180 -40 3 0 {name=pn1 lab=in1} -C {ipin.sym} 480 -40 3 0 {name=pn2 lab=in2} -C {ipin.sym} 170 -120 1 0 {name=pbias lab=vbias} -C {/Volumes/WORK_DRIVE/open_pdks/sky130/sky130A/libs.tech/xschem/sky130_fd_pr/pfet_01v8.sym} -280 -210 0 1 {name=M11 +C {ipin.sym} 560 -430 1 0 {name=pdd lab=vdd} +C {ipin.sym} 470 -70 3 0 {name=pnd lab=gnd} +C {opin.sym} 100 -280 2 0 {name=putput lab=output} +C {ipin.sym} 700 -170 3 0 {name=pn1 lab=in1} +C {ipin.sym} 1000 -170 3 0 {name=pn2 lab=in2} +C {ipin.sym} 690 -250 1 0 {name=pbias lab=vbias} +C {/Volumes/WORK_DRIVE/open_pdks/sky130/sky130A/libs.tech/xschem/sky130_fd_pr/pfet_01v8.sym} 240 -340 0 1 {name=M11 L=0.15 W=1 nf=1 @@ -121,7 +121,7 @@ model=pfet_01v8 spiceprefix=X } -C {/Volumes/WORK_DRIVE/open_pdks/sky130/sky130A/libs.tech/xschem/sky130_fd_pr/nfet_01v8.sym} -120 -80 0 1 {name=M2 +C {/Volumes/WORK_DRIVE/open_pdks/sky130/sky130A/libs.tech/xschem/sky130_fd_pr/nfet_01v8.sym} 400 -210 0 1 {name=M2 L=0.15 W=1 nf=1 @@ -135,9 +135,9 @@ model=nfet_01v8 spiceprefix=X } -C {/Volumes/WORK_DRIVE/open_pdks/sky130/sky130A/libs.tech/xschem/sky130_fd_pr/nfet_01v8.sym} -40 -80 0 0 {name=M1 +C {/Volumes/WORK_DRIVE/open_pdks/sky130/sky130A/libs.tech/xschem/sky130_fd_pr/nfet_01v8.sym} 480 -210 0 0 {name=M1 L=0.15 -W=1 +W=2 nf=1 mult=1 ad="'int((nf+1)/2) * W/nf * 0.29'" @@ -149,9 +149,9 @@ model=nfet_01v8 spiceprefix=X } -C {/Volumes/WORK_DRIVE/open_pdks/sky130/sky130A/libs.tech/xschem/sky130_fd_pr/nfet_01v8.sym} 120 -80 0 1 {name=M5 +C {/Volumes/WORK_DRIVE/open_pdks/sky130/sky130A/libs.tech/xschem/sky130_fd_pr/nfet_01v8.sym} 640 -210 0 1 {name=M5 L=0.15 -W=1 +W=2 nf=1 mult=1 ad="'int((nf+1)/2) * W/nf * 0.29'" @@ -163,9 +163,9 @@ model=nfet_01v8 spiceprefix=X } -C {/Volumes/WORK_DRIVE/open_pdks/sky130/sky130A/libs.tech/xschem/sky130_fd_pr/nfet_01v8.sym} 230 -80 0 0 {name=M6 +C {/Volumes/WORK_DRIVE/open_pdks/sky130/sky130A/libs.tech/xschem/sky130_fd_pr/nfet_01v8.sym} 750 -210 0 0 {name=M6 L=0.15 -W=1 +W=2 nf=1 mult=1 ad="'int((nf+1)/2) * W/nf * 0.29'" @@ -177,9 +177,9 @@ model=nfet_01v8 spiceprefix=X } -C {/Volumes/WORK_DRIVE/open_pdks/sky130/sky130A/libs.tech/xschem/sky130_fd_pr/nfet_01v8.sym} 430 -80 0 1 {name=M7 +C {/Volumes/WORK_DRIVE/open_pdks/sky130/sky130A/libs.tech/xschem/sky130_fd_pr/nfet_01v8.sym} 950 -210 0 1 {name=M7 L=0.15 -W=1 +W=2 nf=1 mult=1 ad="'int((nf+1)/2) * W/nf * 0.29'" @@ -191,7 +191,7 @@ model=nfet_01v8 spiceprefix=X } -C {/Volumes/WORK_DRIVE/open_pdks/sky130/sky130A/libs.tech/xschem/sky130_fd_pr/pfet_01v8.sym} 60 -210 0 1 {name=M3 +C {/Volumes/WORK_DRIVE/open_pdks/sky130/sky130A/libs.tech/xschem/sky130_fd_pr/pfet_01v8.sym} 580 -340 0 1 {name=M3 L=0.15 W=1 nf=1 @@ -205,7 +205,7 @@ model=pfet_01v8 spiceprefix=X } -C {/Volumes/WORK_DRIVE/open_pdks/sky130/sky130A/libs.tech/xschem/sky130_fd_pr/pfet_01v8.sym} -160 -210 0 0 {name=M4 +C {/Volumes/WORK_DRIVE/open_pdks/sky130/sky130A/libs.tech/xschem/sky130_fd_pr/pfet_01v8.sym} 360 -340 0 0 {name=M4 L=0.15 W=1 nf=1 @@ -219,7 +219,7 @@ model=pfet_01v8 spiceprefix=X } -C {/Volumes/WORK_DRIVE/open_pdks/sky130/sky130A/libs.tech/xschem/sky130_fd_pr/pfet_01v8.sym} 310 -210 0 0 {name=M8 +C {/Volumes/WORK_DRIVE/open_pdks/sky130/sky130A/libs.tech/xschem/sky130_fd_pr/pfet_01v8.sym} 830 -340 0 0 {name=M8 L=0.15 W=1 nf=1
diff --git a/xschem/powerdetector/balaced-pd.sym b/xschem/powerdetector/balaced-pd.sym index 08eccc3..3fbaf5f 100644 --- a/xschem/powerdetector/balaced-pd.sym +++ b/xschem/powerdetector/balaced-pd.sym
@@ -1,4 +1,4 @@ -v {xschem version=2.9.9 file_version=1.2 } +v {xschem version=3.0.0 file_version=1.2 } G {} K {type=subcircuit format="@name @pinlist @symname" @@ -28,9 +28,11 @@ L 4 200 -70 200 -65 {} L 4 85 -65 90 -70 {} L 4 85 -70 90 -65 {} -B 5 47.5 -112.5 52.5 -107.5 {name=in1 +L 4 50 -90 50 -80 {} +L 4 50 -120 50 -110 {} +B 5 47.5 -122.5 52.5 -117.5 {name=in1 dir=in} -B 5 47.5 -92.5 52.5 -87.5 {name=in2 +B 5 47.5 -82.5 52.5 -77.5 {name=in2 dir=in} B 5 107.5 -162.5 112.5 -157.5 {name=vbias dir=in}
diff --git a/xschem/user_analog_project_wrapper.sch b/xschem/user_analog_project_wrapper.sch index e3cbcec..3b01db6 100644 --- a/xschem/user_analog_project_wrapper.sch +++ b/xschem/user_analog_project_wrapper.sch
@@ -1,180 +1,139 @@ -v {xschem version=2.9.9 file_version=1.2 } +v {xschem version=3.0.0 file_version=1.2 } G {} K {} V {} S {} E {} -N 3830 -460 3830 -390 { lab=vdda1} -N 3730 -460 3830 -460 { lab=vdda1} -N 3860 -230 3860 -180 { lab=vssa1} -N 3770 -180 3860 -180 { lab=vssa1} -N 3890 -460 3890 -390 { lab=vccd1} -N 3890 -460 3960 -460 { lab=vccd1} -N 3890 -130 3890 -60 { lab=vccd1} -N 3890 -130 3950 -130 { lab=vccd1} -N 3830 -130 3830 -60 { lab=io_analog[4]} -N 3790 -130 3830 -130 { lab=io_analog[4]} -N 3860 100 3860 150 { lab=vssa1} -N 3800 150 3860 150 { lab=vssa1} -N 4010 -10 4110 -10 { lab=gpio_analog[7]} -N 4010 20 4110 20 { lab=io_out[15]} -N 4010 50 4110 50 { lab=io_out[16]} -N 4010 -340 4130 -340 { lab=gpio_analog[3]} -N 4010 -310 4130 -310 { lab=io_out[11]} -N 4010 -280 4130 -280 { lab=io_out[12]} -N 3670 300 3670 340 { lab=io_clamp_low[2]} -N 3670 400 3670 420 { lab=vssa1} -N 3670 440 3670 460 { lab=io_clamp_high[2]} -N 3670 520 3670 530 { lab=vssa1} -N 3670 570 3670 590 { lab=io_clamp_low[1]} -N 3670 650 3670 670 { lab=vssa1} -N 4160 300 4160 330 { lab=io_clamp_high[1]} -N 4160 390 4160 410 { lab=vssa1} -N 4160 440 4160 460 { lab=io_clamp_low[0]} -N 4160 520 4160 530 { lab=vssa1} -N 4160 550 4160 560 { lab=io_clamp_high[0]} -N 4160 620 4160 640 { lab=io_analog[4]} -N 3630 300 3670 300 { lab=io_clamp_low[2]} -N 3630 420 3670 420 { lab=vssa1} -N 3630 440 3670 440 { lab=io_clamp_high[2]} -N 3630 530 3670 530 { lab=vssa1} -N 3630 570 3670 570 { lab=io_clamp_low[1]} -N 3630 670 3670 670 { lab=vssa1} -N 4130 300 4160 300 { lab=io_clamp_high[1]} -N 4130 410 4160 410 { lab=vssa1} -N 4130 440 4160 440 { lab=io_clamp_low[0]} -N 4130 530 4160 530 { lab=vssa1} -N 4130 550 4160 550 { lab=io_clamp_high[0]} -N 4130 640 4160 640 { lab=io_analog[4]} -N 3670 710 3670 750 { lab=io_oeb[12]} -N 3670 810 3670 830 { lab=vssd1} -N 3670 850 3670 870 { lab=io_oeb[16]} -N 3670 930 3670 940 { lab=vssd1} -N 4160 710 4160 740 { lab=io_oeb[11]} -N 4160 800 4160 820 { lab=vssd1} -N 4160 850 4160 870 { lab=#net1} -N 4160 930 4160 940 { lab=vssd1} -N 3630 710 3670 710 { lab=io_oeb[12]} -N 3630 830 3670 830 { lab=vssd1} -N 3630 850 3670 850 { lab=io_oeb[16]} -N 3630 940 3670 940 { lab=vssd1} -N 4130 710 4160 710 { lab=io_oeb[11]} -N 4130 820 4160 820 { lab=vssd1} -N 4130 850 4160 850 { lab=#net1} -N 4130 940 4160 940 { lab=vssd1} -C {example_por.sym} 3860 -310 0 0 {name=x1} -C {example_por.sym} 3860 20 0 0 {name=x2} -C {devices/iopin.sym} 3240 -470 0 0 {name=p1 lab=vdda1} -C {devices/iopin.sym} 3240 -440 0 0 {name=p2 lab=vdda2} -C {devices/iopin.sym} 3240 -410 0 0 {name=p3 lab=vssa1} -C {devices/iopin.sym} 3240 -380 0 0 {name=p4 lab=vssa2} -C {devices/iopin.sym} 3240 -350 0 0 {name=p5 lab=vccd1} -C {devices/iopin.sym} 3240 -320 0 0 {name=p6 lab=vccd2} -C {devices/iopin.sym} 3240 -290 0 0 {name=p7 lab=vssd1} -C {devices/iopin.sym} 3240 -260 0 0 {name=p8 lab=vssd2} -C {devices/ipin.sym} 3290 -190 0 0 {name=p9 lab=wb_clk_i} -C {devices/ipin.sym} 3290 -160 0 0 {name=p10 lab=wb_rst_i} -C {devices/ipin.sym} 3290 -130 0 0 {name=p11 lab=wbs_stb_i} -C {devices/ipin.sym} 3290 -100 0 0 {name=p12 lab=wbs_cyc_i} -C {devices/ipin.sym} 3290 -70 0 0 {name=p13 lab=wbs_we_i} -C {devices/ipin.sym} 3290 -40 0 0 {name=p14 lab=wbs_sel_i[3:0]} -C {devices/ipin.sym} 3290 -10 0 0 {name=p15 lab=wbs_dat_i[31:0]} -C {devices/ipin.sym} 3290 20 0 0 {name=p16 lab=wbs_adr_i[31:0]} -C {devices/opin.sym} 3280 80 0 0 {name=p17 lab=wbs_ack_o} -C {devices/opin.sym} 3280 110 0 0 {name=p18 lab=wbs_dat_o[31:0]} -C {devices/ipin.sym} 3290 150 0 0 {name=p19 lab=la_data_in[127:0]} -C {devices/opin.sym} 3280 180 0 0 {name=p20 lab=la_data_out[127:0]} -C {devices/ipin.sym} 3290 260 0 0 {name=p21 lab=io_in[26:0]} -C {devices/ipin.sym} 3290 290 0 0 {name=p22 lab=io_in_3v3[26:0]} -C {devices/ipin.sym} 3280 570 0 0 {name=p23 lab=user_clock2} -C {devices/opin.sym} 3280 320 0 0 {name=p24 lab=io_out[26:0]} -C {devices/opin.sym} 3280 350 0 0 {name=p25 lab=io_oeb[26:0]} -C {devices/iopin.sym} 3250 410 0 0 {name=p26 lab=gpio_analog[17:0]} -C {devices/iopin.sym} 3250 440 0 0 {name=p27 lab=gpio_noesd[17:0]} -C {devices/iopin.sym} 3250 470 0 0 {name=p29 lab=io_analog[10:0]} -C {devices/iopin.sym} 3250 500 0 0 {name=p30 lab=io_clamp_high[2:0]} -C {devices/iopin.sym} 3250 530 0 0 {name=p31 lab=io_clamp_low[2:0]} -C {devices/opin.sym} 3270 600 0 0 {name=p32 lab=user_irq[2:0]} -C {devices/ipin.sym} 3290 210 0 0 {name=p28 lab=la_oenb[127:0]} -C {devices/lab_pin.sym} 3730 -460 0 0 {name=l1 sig_type=std_logic lab=vdda1} -C {devices/lab_pin.sym} 3770 -180 0 0 {name=l2 sig_type=std_logic lab=vssa1} -C {devices/lab_pin.sym} 3960 -460 0 1 {name=l3 sig_type=std_logic lab=vccd1} -C {devices/lab_pin.sym} 3950 -130 0 1 {name=l4 sig_type=std_logic lab=vccd1} -C {devices/lab_pin.sym} 3790 -130 0 0 {name=l5 sig_type=std_logic lab=io_analog[4]} -C {devices/lab_pin.sym} 3800 150 0 0 {name=l6 sig_type=std_logic lab=vssa1} -C {devices/lab_pin.sym} 4130 -340 0 1 {name=l7 sig_type=std_logic lab=gpio_analog[3]} -C {devices/lab_pin.sym} 4130 -310 0 1 {name=l8 sig_type=std_logic lab=io_out[11]} -C {devices/lab_pin.sym} 4130 -280 0 1 {name=l9 sig_type=std_logic lab=io_out[12]} -C {devices/lab_pin.sym} 4110 -10 0 1 {name=l10 sig_type=std_logic lab=gpio_analog[7]} -C {devices/lab_pin.sym} 4110 20 0 1 {name=l11 sig_type=std_logic lab=io_out[15]} -C {devices/lab_pin.sym} 4110 50 0 1 {name=l12 sig_type=std_logic lab=io_out[16]} -C {sky130_fd_pr/res_generic_m1.sym} 3670 370 0 0 {name=R1 -W=11 -L=0.25 -model=res_generic_m3 -mult=1} -C {sky130_fd_pr/res_generic_m1.sym} 3670 490 0 0 {name=R2 -W=11 -L=0.25 -model=res_generic_m3 -mult=1} -C {sky130_fd_pr/res_generic_m1.sym} 3670 620 0 0 {name=R4 -W=11 -L=0.25 -model=res_generic_m3 -mult=1} -C {sky130_fd_pr/res_generic_m1.sym} 4160 360 0 0 {name=R5 -W=11 -L=0.25 -model=res_generic_m3 -mult=1} -C {sky130_fd_pr/res_generic_m1.sym} 4160 490 0 0 {name=R6 -W=11 -L=0.25 -model=res_generic_m3 -mult=1} -C {sky130_fd_pr/res_generic_m1.sym} 4160 590 0 0 {name=R7 -W=11 -L=0.25 -model=res_generic_m3 -mult=1} -C {devices/lab_pin.sym} 3630 300 0 0 {name=l13 sig_type=std_logic lab=io_clamp_low[2]} -C {devices/lab_pin.sym} 3630 440 0 0 {name=l14 sig_type=std_logic lab=io_clamp_high[2]} -C {devices/lab_pin.sym} 3630 570 0 0 {name=l15 sig_type=std_logic lab=io_clamp_low[1]} -C {devices/lab_pin.sym} 4130 300 0 0 {name=l16 sig_type=std_logic lab=io_clamp_high[1]} -C {devices/lab_pin.sym} 4130 440 0 0 {name=l17 sig_type=std_logic lab=io_clamp_low[0]} -C {devices/lab_pin.sym} 3630 420 0 0 {name=l18 sig_type=std_logic lab=vssa1} -C {devices/lab_pin.sym} 3630 530 0 0 {name=l19 sig_type=std_logic lab=vssa1} -C {devices/lab_pin.sym} 4130 410 0 0 {name=l20 sig_type=std_logic lab=vssa1} -C {devices/lab_pin.sym} 4130 530 0 0 {name=l21 sig_type=std_logic lab=vssa1} -C {devices/lab_pin.sym} 3630 670 0 0 {name=l22 sig_type=std_logic lab=vssa1} -C {devices/lab_pin.sym} 4130 550 0 0 {name=l23 sig_type=std_logic lab=io_clamp_high[0]} -C {devices/lab_pin.sym} 4130 640 0 0 {name=l24 sig_type=std_logic lab=io_analog[4]} -C {sky130_fd_pr/res_generic_m1.sym} 3670 780 0 0 {name=R8 -W=0.56 -L=0.49 -model=res_generic_m3 -mult=1} -C {sky130_fd_pr/res_generic_m1.sym} 3670 900 0 0 {name=R9 -W=0.56 -L=0.31 -model=res_generic_m3 -mult=1} -C {sky130_fd_pr/res_generic_m1.sym} 4160 770 0 0 {name=R11 -W=0.56 -L=0.58 -model=res_generic_m3 -mult=1} -C {sky130_fd_pr/res_generic_m1.sym} 4160 900 0 0 {name=R12 -W=0.56 -L=0.6 -model=res_generic_m3 -mult=1} -C {devices/lab_pin.sym} 4130 850 0 0 {name=l25 sig_type=std_logic lab=io_oeb[15]} -C {devices/lab_pin.sym} 3630 850 0 0 {name=l26 sig_type=std_logic lab=io_oeb[16]} -C {devices/lab_pin.sym} 4130 710 0 0 {name=l27 sig_type=std_logic lab=io_oeb[11]} -C {devices/lab_pin.sym} 3630 710 0 0 {name=l28 sig_type=std_logic lab=io_oeb[12]} -C {devices/lab_pin.sym} 3630 830 0 0 {name=l29 sig_type=std_logic lab=vssd1} -C {devices/lab_pin.sym} 3630 940 0 0 {name=l30 sig_type=std_logic lab=vssd1} -C {devices/lab_pin.sym} 4130 820 0 0 {name=l31 sig_type=std_logic lab=vssd1} -C {devices/lab_pin.sym} 4130 940 0 0 {name=l32 sig_type=std_logic lab=vssd1} +N 240 -340 240 -260 { +lab=dsa_ctr1} +N 270 -340 270 -260 { +lab=dsa_ctr2} +N 310 -340 310 -260 { +lab=dsa_ctr3} +N 340 -340 340 -260 { +lab=dsa_ctr4} +N 160 -280 340 -280 { +lab=dsa_ctr4} +N 160 -300 310 -300 { +lab=dsa_ctr3} +N 160 -340 240 -340 { +lab=dsa_ctr1} +N 160 -320 270 -320 { +lab=dsa_ctr2} +N 440 -320 480 -320 { +lab=#net1} +N 440 -280 480 -280 { +lab=#net2} +N 370 -200 420 -200 { +lab=#net2} +N 370 -400 420 -400 { +lab=#net1} +N 420 -320 440 -320 { +lab=#net1} +N 420 -280 440 -280 { +lab=#net2} +N 420 -280 420 -200 { +lab=#net2} +N 420 -400 420 -320 { +lab=#net1} +N 660 -320 720 -320 { +lab=out1} +N 660 -280 720 -280 { +lab=out2} +N 720 -320 740 -320 { +lab=out1} +N 720 -280 740 -280 { +lab=out2} +N 700 -340 700 -320 { +lab=out1} +N 700 -280 700 -260 { +lab=out2} +N 700 -260 700 -240 { +lab=out2} +N 700 -360 700 -340 { +lab=out1} +N 550 -230 550 -220 { +lab=gnd2} +N 550 -220 570 -220 { +lab=gnd2} +N 570 -230 570 -220 { +lab=gnd2} +N 560 -220 560 -180 { +lab=gnd2} +N 840 -240 840 -180 { +lab=gnd1} +N 550 -380 550 -370 { +lab=vdd2} +N 550 -380 570 -380 { +lab=vdd2} +N 570 -380 570 -370 { +lab=vdd2} +N 560 -420 560 -380 { +lab=vdd2} +N 870 -420 870 -360 { +lab=vdd1} +N 800 -380 800 -360 { +lab=vbias} +N 780 -380 800 -380 { +lab=vbias} +N 930 -300 1000 -300 { +lab=pd_out} +N 80 -400 210 -400 { +lab=in1} +N 80 -200 210 -200 { +lab=in2} +N 310 -140 310 -100 { +lab=gnd3} +N 270 -140 270 -120 { +lab=vdd3} +N 270 -480 270 -460 { +lab=vdd4} +N 870 -420 920 -420 { +lab=vdd1} +N 840 -180 920 -180 { +lab=gnd1} +N 680 -360 700 -360 { +lab=out1} +N 680 -240 700 -240 { +lab=out2} +N 270 -120 270 -100 { +lab=vdd3} +N 270 -500 270 -480 { +lab=vdd4} +N 310 -500 310 -460 { +lab=gnd4} +C {/Volumes/WORK_DRIVE/caravel_automatic_gain_control/xschem/attenuator/dsa.sym} 30 -20 0 0 {name=XDSA1} +C {/Volumes/WORK_DRIVE/caravel_automatic_gain_control/xschem/attenuator/dsa.sym} 30 -580 2 1 {name=XDSA2} +C {/Volumes/WORK_DRIVE/caravel_automatic_gain_control/xschem/lownoiseamplifier/cmfb-negfb-revision.sym} 300 -80 0 0 {name=XLNA1} +C {/Volumes/WORK_DRIVE/caravel_automatic_gain_control/xschem/powerdetector/balaced-pd.sym} 690 -200 0 0 {name=X1} +C {ipin.sym} 80 -400 0 0 {name=in1 lab=in1} +C {ipin.sym} 80 -200 0 0 {name=in2 lab=in2} +C {ipin.sym} 780 -380 0 0 {name=vbias lab=vbias} +C {ipin.sym} 920 -420 2 0 {name=vdd1 lab=vdd1} +C {ipin.sym} 920 -180 2 0 {name=gnd1 lab=gnd1} +C {ipin.sym} 160 -340 0 0 {name=ctr1 lab=dsa_ctr1} +C {ipin.sym} 160 -320 0 0 {name=ctr2 lab=dsa_ctr2} +C {ipin.sym} 160 -300 0 0 {name=ctr3 lab=dsa_ctr3} +C {ipin.sym} 160 -280 0 0 {name=ctr4 lab=dsa_ctr4} +C {opin.sym} 1000 -300 0 0 {name=p1 lab=pd_out} +C {opin.sym} 680 -360 2 0 {name=out1 lab=out1} +C {opin.sym} 680 -240 2 0 {name=out2 lab=out2} +C {code.sym} 1020 -160 0 0 {name=sT_MODELS +only_toplevel=true +format="tcleval( @value )" +value="** manual skywater pdks install (with patches applied) +* .lib \\\\$::SKYWATER_MODELS\\\\/models/sky130.lib.spice tt + +** opencircuitdesign pdks install +.lib \\\\$::SKYWATER_MODELS\\\\/sky130.lib.spice tt + +.param mc_mm_switch=0 +.param mc_pr_switch=0 +" +spice_ignore=false} +C {ipin.sym} 560 -180 3 0 {name=gnd2 lab=gnd2} +C {ipin.sym} 310 -100 3 0 {name=gnd3 lab=gnd3} +C {ipin.sym} 310 -500 1 0 {name=gnd4 lab=gnd4} +C {ipin.sym} 560 -420 1 0 {name=vdd2 lab=vdd2} +C {ipin.sym} 270 -100 3 0 {name=vdd3 lab=vdd3} +C {ipin.sym} 270 -500 1 0 {name=vdd5 lab=vdd4}
diff --git a/xschem/user_analog_project_wrapper.sym b/xschem/user_analog_project_wrapper.sym index a561ba9..181dfb7 100644 --- a/xschem/user_analog_project_wrapper.sym +++ b/xschem/user_analog_project_wrapper.sym
@@ -1,4 +1,4 @@ -v {xschem version=2.9.9 file_version=1.2 } +v {xschem version=3.0.0 file_version=1.2 } G {} K {type=subcircuit format="@name @pinlist @symname" @@ -7,105 +7,63 @@ V {} S {} E {} -L 4 -130 -190 130 -190 {} -L 4 -130 190 130 190 {} -L 4 -130 -190 -130 190 {} -L 4 130 -190 130 190 {} -L 4 -150 -180 -130 -180 {} -L 4 -150 -160 -130 -160 {} -L 4 -150 -140 -130 -140 {} -L 4 -150 -120 -130 -120 {} -L 4 -150 -100 -130 -100 {} -L 4 -150 -80 -130 -80 {} -L 4 -150 -60 -130 -60 {} -L 4 -150 -40 -130 -40 {} -L 4 130 -20 150 -20 {} -L 4 130 0 150 0 {} -L 4 -150 -20 -130 -20 {} -L 4 130 20 150 20 {} -L 4 -150 0 -130 0 {} -L 4 -150 20 -130 20 {} -L 4 -150 40 -130 40 {} -L 4 130 40 150 40 {} -L 4 130 60 150 60 {} -L 4 -150 60 -130 60 {} -L 4 130 180 150 180 {} -L 7 130 -180 150 -180 {} -L 7 130 -160 150 -160 {} -L 7 130 -140 150 -140 {} -L 7 130 -120 150 -120 {} -L 7 130 -100 150 -100 {} -L 7 130 -80 150 -80 {} -L 7 130 -60 150 -60 {} -L 7 130 -40 150 -40 {} -L 7 130 80 150 80 {} -L 7 130 100 150 100 {} -L 7 130 120 150 120 {} -L 7 130 140 150 140 {} -L 7 130 160 150 160 {} -B 5 147.5 -182.5 152.5 -177.5 {name=vdda1 dir=inout } -B 5 147.5 -162.5 152.5 -157.5 {name=vdda2 dir=inout } -B 5 147.5 -142.5 152.5 -137.5 {name=vssa1 dir=inout } -B 5 147.5 -122.5 152.5 -117.5 {name=vssa2 dir=inout } -B 5 147.5 -102.5 152.5 -97.5 {name=vccd1 dir=inout } -B 5 147.5 -82.5 152.5 -77.5 {name=vccd2 dir=inout } -B 5 147.5 -62.5 152.5 -57.5 {name=vssd1 dir=inout } -B 5 147.5 -42.5 152.5 -37.5 {name=vssd2 dir=inout } -B 5 -152.5 -182.5 -147.5 -177.5 {name=wb_clk_i dir=in } -B 5 -152.5 -162.5 -147.5 -157.5 {name=wb_rst_i dir=in } -B 5 -152.5 -142.5 -147.5 -137.5 {name=wbs_stb_i dir=in } -B 5 -152.5 -122.5 -147.5 -117.5 {name=wbs_cyc_i dir=in } -B 5 -152.5 -102.5 -147.5 -97.5 {name=wbs_we_i dir=in } -B 5 -152.5 -82.5 -147.5 -77.5 {name=wbs_sel_i[3:0] dir=in } -B 5 -152.5 -62.5 -147.5 -57.5 {name=wbs_dat_i[31:0] dir=in } -B 5 -152.5 -42.5 -147.5 -37.5 {name=wbs_adr_i[31:0] dir=in } -B 5 147.5 -22.5 152.5 -17.5 {name=wbs_ack_o dir=out } -B 5 147.5 -2.5 152.5 2.5 {name=wbs_dat_o[31:0] dir=out } -B 5 -152.5 -22.5 -147.5 -17.5 {name=la_data_in[127:0] dir=in } -B 5 147.5 17.5 152.5 22.5 {name=la_data_out[127:0] dir=out } -B 5 -152.5 -2.5 -147.5 2.5 {name=la_oenb[127:0] dir=in } -B 5 -152.5 17.5 -147.5 22.5 {name=io_in[26:0] dir=in } -B 5 -152.5 37.5 -147.5 42.5 {name=io_in_3v3[26:0] dir=in } -B 5 147.5 37.5 152.5 42.5 {name=io_out[26:0] dir=out } -B 5 147.5 57.5 152.5 62.5 {name=io_oeb[26:0] dir=out } -B 5 147.5 77.5 152.5 82.5 {name=gpio_analog[17:0] dir=inout } -B 5 147.5 97.5 152.5 102.5 {name=gpio_noesd[17:0] dir=inout } -B 5 147.5 117.5 152.5 122.5 {name=io_analog[10:0] dir=inout } -B 5 147.5 137.5 152.5 142.5 {name=io_clamp_high[2:0] dir=inout } -B 5 147.5 157.5 152.5 162.5 {name=io_clamp_low[2:0] dir=inout } -B 5 -152.5 57.5 -147.5 62.5 {name=user_clock2 dir=in } -B 5 147.5 177.5 152.5 182.5 {name=user_irq[2:0] dir=out } -T {@symname} -119.5 114 0 0 0.3 0.3 {} -T {@name} 135 -202 0 0 0.2 0.2 {} -T {vdda1} 125 -184 0 1 0.2 0.2 {} -T {vdda2} 125 -164 0 1 0.2 0.2 {} -T {vssa1} 125 -144 0 1 0.2 0.2 {} -T {vssa2} 125 -124 0 1 0.2 0.2 {} -T {vccd1} 125 -104 0 1 0.2 0.2 {} -T {vccd2} 125 -84 0 1 0.2 0.2 {} -T {vssd1} 125 -64 0 1 0.2 0.2 {} -T {vssd2} 125 -44 0 1 0.2 0.2 {} -T {wb_clk_i} -125 -184 0 0 0.2 0.2 {} -T {wb_rst_i} -125 -164 0 0 0.2 0.2 {} -T {wbs_stb_i} -125 -144 0 0 0.2 0.2 {} -T {wbs_cyc_i} -125 -124 0 0 0.2 0.2 {} -T {wbs_we_i} -125 -104 0 0 0.2 0.2 {} -T {wbs_sel_i[3:0]} -125 -84 0 0 0.2 0.2 {} -T {wbs_dat_i[31:0]} -125 -64 0 0 0.2 0.2 {} -T {wbs_adr_i[31:0]} -125 -44 0 0 0.2 0.2 {} -T {wbs_ack_o} 125 -24 0 1 0.2 0.2 {} -T {wbs_dat_o[31:0]} 125 -4 0 1 0.2 0.2 {} -T {la_data_in[127:0]} -125 -24 0 0 0.2 0.2 {} -T {la_data_out[127:0]} 125 16 0 1 0.2 0.2 {} -T {la_oenb[127:0]} -125 -4 0 0 0.2 0.2 {} -T {io_in[26:0]} -125 16 0 0 0.2 0.2 {} -T {io_in_3v3[26:0]} -125 36 0 0 0.2 0.2 {} -T {io_out[26:0]} 125 36 0 1 0.2 0.2 {} -T {io_oeb[26:0]} 125 56 0 1 0.2 0.2 {} -T {gpio_analog[17:0]} 125 76 0 1 0.2 0.2 {} -T {gpio_noesd[17:0]} 125 96 0 1 0.2 0.2 {} -T {io_analog[10:0]} 125 116 0 1 0.2 0.2 {} -T {io_clamp_high[2:0]} 125 136 0 1 0.2 0.2 {} -T {io_clamp_low[2:0]} 125 156 0 1 0.2 0.2 {} -T {user_clock2} -125 56 0 0 0.2 0.2 {} -T {user_irq[2:0]} 125 176 0 1 0.2 0.2 {} +L 3 220 -360 230 -360 {} +L 3 230 -360 230 -300 {} +L 3 220 -300 230 -300 {} +L 3 230 -330 240 -330 {} +L 3 370 -360 380 -360 {} +L 3 370 -360 370 -300 {} +L 3 370 -300 380 -300 {} +L 3 360 -330 370 -330 {} +L 4 200 -380 200 -100 {} +L 4 200 -380 400 -380 {} +L 4 400 -380 400 -100 {} +L 4 200 -100 400 -100 {} +L 4 400 -360 440 -360 {} +L 4 400 -340 440 -340 {} +L 4 400 -320 440 -320 {} +L 4 400 -300 440 -300 {} +L 4 160 -260 200 -260 {} +L 4 160 -240 200 -240 {} +L 4 160 -220 200 -220 {} +L 4 400 -170 440 -170 {} +L 4 400 -140 440 -140 {} +L 4 400 -120 440 -120 {} +L 4 160 -360 200 -360 {} +L 4 160 -340 200 -340 {} +L 4 160 -320 200 -320 {} +L 4 160 -300 200 -300 {} +L 4 160 -200 200 -200 {} +L 4 160 -170 200 -170 {} +L 4 160 -140 200 -140 {} +L 4 160 -120 200 -120 {} +B 5 157.5 -362.5 162.5 -357.5 {} +B 5 157.5 -342.5 162.5 -337.5 {} +B 5 157.5 -322.5 162.5 -317.5 {} +B 5 157.5 -302.5 162.5 -297.5 {} +B 5 437.5 -362.5 442.5 -357.5 {} +B 5 437.5 -342.5 442.5 -337.5 {} +B 5 437.5 -322.5 442.5 -317.5 {} +B 5 437.5 -302.5 442.5 -297.5 {} +B 5 157.5 -262.5 162.5 -257.5 {} +B 5 157.5 -242.5 162.5 -237.5 {} +B 5 157.5 -222.5 162.5 -217.5 {} +B 5 157.5 -202.5 162.5 -197.5 {} +B 5 157.5 -172.5 162.5 -167.5 {} +B 5 157.5 -142.5 162.5 -137.5 {} +B 5 157.5 -122.5 162.5 -117.5 {} +B 5 437.5 -172.5 442.5 -167.5 {} +B 5 437.5 -142.5 442.5 -137.5 {} +B 5 437.5 -122.5 442.5 -117.5 {} +T {vdd1-4} 245 -335 0 0 0.2 0.2 {} +T {gnd1-4} 325 -335 0 0 0.2 0.2 {} +T {dsa_ctr1} 205 -265 0 0 0.2 0.2 {} +T {dsa_ctr2} 205 -245 0 0 0.2 0.2 {} +T {dsa_ctr3} 205 -225 0 0 0.2 0.2 {} +T {dsa_ctr4} 205 -205 0 0 0.2 0.2 {} +T {vbias} 205 -175 0 0 0.2 0.2 {} +T {in1} 205 -145 0 0 0.2 0.2 {} +T {in2} 205 -125 0 0 0.2 0.2 {} +T {out1} 375 -145 0 0 0.2 0.2 {} +T {out2} 375 -125 0 0 0.2 0.2 {} +T {pd_out} 365 -175 0 0 0.2 0.2 {}